Data Sheet

AD5304/AD5314/AD5324

Rev. H | Page 7 of 24

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

AD5304/

AD5314/

AD5324

TOP VIEW

(Not to Scale)

SYNC

10

SCLK

9

DIN

8

GND

7

6

Figure 3. 10-Lead MSOP Pin Configuration

REFIN

AD5304/

AD5314/

AD5324

NOTES

1. THE EXPOSED PAD IS THE GROUND REFERENCE POINT

FOR ALL CIRCUITRY ON THE PART. IT CAN BE

CONNECTED TO 0 V OR LEFT UNCONNECTED PROVIDED

THERE IS A CONNECTION TO 0 V VIA THE GND PIN.

TOP VIEW

(Not to Scale)

SCLK

DIN

GND

SYNC

1

2

3

4

5

10

9

8

7

6

Figure 4. 10-Lead LFCSP Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

Power Supply Input. These parts can be operated from 2.5 V to 5.5 V and the supply can be decoupled to GND.

2

Buffered Analog Output Voltage from DAC A. The output amplifier has rail-to-rail operation.

3

Buffered Analog Output Voltage from DAC B. The output amplifier has rail-to-rail operation.

4

Buffered Analog Output Voltage from DAC C. The output amplifier has rail-to-rail operation.

5

REFIN

6

Buffered Analog Output Voltage from DAC D. The output amplifier has rail-to-rail operation.

7

GND

Ground Reference Point for All Circuitry on the Part.

8

DIN

Serial Data Input. This device has a 16-bit shift register. Data is clocked into the register on the falling edge of the

serial clock input. The DIN input buffer is powered down after each write cycle.

9

SCLK

Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data can

be transferred at clock speeds up to 30 MHz. The SCLK input buffer is powered down after each write cycle.

10

SYNC

Active Low Control Input. This is the frame synchronization signal for the input data. When SYNC goes low, it

enables the input shift register and data is transferred in on the falling edges of the following 16 clocks. If SYNC is

sequence is ignored by the device.

Exposed

Paddle1

Ground Reference Point for All Circuitry on the Part. Can be connected to 0 V or left unconnected provided there is

a connection to 0 V via the GND pin.