ISO7420FCC

SLLSED3A – JUNE 2013 – REVISED JULY 2013

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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

PIN DESCRIPTIONS

PIN

I/O

DESCRIPTION

NAME

ISO7420FCC

INA

2

I

Input, channel A

INB

3

I

Input, channel B

GND1

4

–

GND2

5

–

OUTA

7

O

Output, channel A

OUTB

6

O

Output, channel B

1

–

8

–

Table 1. FUNCTION TABLE

INPUT SIDE

OUTPUT SIDE

INPUT

OUTPUT

INA, INB

OUTA, OUTB

H

H

PU

PU

L

L

Open

PD

PU

X

X

PD

X

Undetermined

(1)

In fail-safe condition, output defaults to low level

AVAILABLE OPTIONS

DATA

DEFAULT

INTEGRATED

CHANNEL

MARKED

ORDERING

PRODUCT

RATE

OUTPUT

NOISE FILTER

DIRECTION

AS

NUMBER

ISO7420FCCD (rail)

–40°C to

ISO7420FCC

50 Mbps

Low

Yes

Same

7420FC

ISO7420FCCDR

125°C

(reel)

ABSOLUTE MAXIMUM RATINGS

(1)

VALUE

–0.5 V to 6 V

Voltage at INA, INB

–0.5 V to 6 V

Voltage at OUTA, OUTB

Output current

±15 mA

Human-body model

JEDEC Standard 22, Test Method

±4 kV

A114-C.01

All

ESD

Electrostatic discharge

pins

Field-induced charged-device

JEDEC Standard 22, Test Method

±1.5 kV

model

C101

Maximum junction temperature

150°C

Storage temperature

-65°C to 150°C

(1)

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltage values except differential I/O bus voltages are with respect to network ground terminal and are peak voltage values.

2

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