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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST1CC40DR датащи(PDF) 9 Page - STMicroelectronics |
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ST1CC40DR датащи(HTML) 9 Page - STMicroelectronics |
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9 / 37 page  DocID18279 Rev 5 9/37 ST1CC40 Functional description 37 5 Functional description The ST1CC40 device is based on a “peak current mode” architecture with fixed frequency control. As a consequence, the intersection between the error amplifier output and the sensed inductor current generates the control signal to drive the power switch. The main internal blocks shown in the block diagram in Figure 3 are: High-side and low-side embedded power element for synchronous rectification A fully integrated sawtooth oscillator with a typical frequency of 850 kHz A transconductance error amplifier A high-side current sense amplifier to track the inductor current A pulse width modulator (PWM) comparator and the circuitry necessary to drive the internal power element The soft-start circuitry to decrease the inrush current at power-up The current limitation circuit based on the pulse-by-pulse current protection with frequency divider The inhibit circuitry The thermal protection function circuitry Figure 3. ST1CC40 block diagram |
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