LKT datasheet(3/8 Pages) KINGTRONICS

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LKT

Low Voltage Multilayer Chip Ceramic

Capacitor

 Specification and Test Condition:

1. Appearance

Dielectrics

Specification

Testing Condition

NPO/X7R/X5R/Y5V

No defects or abnormalities

Visual inspection

2. Dimensions

Dielectrics

Specification

Testing Condition

NPO/X7R/X5R/Y5V

Within the specified dimensions

Using calipers on micrometer

3. Capacitance

Dielectrics

Specification

Testing Condition

NPO

Within the specified tolerance

B:±0.1pF;C:±0.25pF;D:±0.5pF;J: ±5%

1.0±0.2Vrms, 1MHz±10%

(C>1000 pF, 1.0±0.2Vrms, 1KHz±10%，)

25℃

X7R/X5R

Within the specified tolerance

J: ±5%；K: ±10%； M: ±20%

1.0±0.2Vrms, 1KHz±10%

（

Cp＞10uF,0.5±0.1Vrms,120±24Hz）

at 25 ,48hrs after annealing

℃

Y5V

Within the specified tolerance

M: ±20%; Z: +80% ~ -20%

1.0±0.2Vrms, 1KHz±10%

（

Cp＞10uF,0.5±0.1Vrms,120±24Hz）

at 25℃, 48hrs after annealing

4. Dissipation Factor

Dielectrics

Specification

Testing Condition

NPO

Cp<30pF, Q≥400+20Cp;

Cp≥30pF, Q≥1000

1.0±0.2Vrms,1MHz±10% ,25℃

(Cp>1000pF,1.0±0.2Vrms,1KHz±10%)

X7R/X5R

VR≥25V, DF ≤2.5%

VR =16V, DF ≤3.5%

VR ≤10V, DF ≤5.0%

1.0±0.2Vrms, 1KHz±10%,

(Cp＞10uF,0.5±0.1Vrms,120±24Hz)

at 25℃,48hrs after annealing

Y5V

VR≥25V, DF ≤7.0% (C<1.0μF)

DF ≤9.0% (C≥1.0μF)

VR =16V, DF ≤9.0%

VR ≤10V, DF ≤12.5%

1.0±0.2Vrms, 1KHz±10%,

(Cp＞10uF,0.5±0.1Vrms,120±24Hz)

at 25℃,48hrs after annealing

5. Insulation Resistance

Dielectrics

Specification

Testing Condition

NPO/X7R/

X5R/Y5V

More than 10 GΩ or 500Ω·F, whichever is

smaller.

Rated voltage for 60±5sec, at 25℃

6. Dielectric Strength

Dielectrics

Specification

Testing Condition

NPO /X7R/X5R/Y5V

No defects or abnormalities.

No failure shall be observed when 300% (NPO);250%

(X7R/ X5R/Y5V)of the rated voltage is applied between

terminations for 1 to 5 seconds, provided the charge

/discharge current is less than 500mA

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