AD7939BCPZ datasheet(17/36 Pages) AD

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Data Sheet

AD7938/AD7939

Rev. C | Page 17 of 36

SHADOW REGISTER

The shadow register on the AD7938/AD7939 is an 8-bit, write-

only register. Data is loaded from DB0 to DB7 on the rising

edge of WR. The eight LSBs load into the shadow register. The

information is written into the shadow register provided that

the SEQ and SHDW bits in the control register were set to 0 and

1, respectively, in the previous write to the control register. Each

bit represents an analog input from Channel 0 through Channel 7.

A sequence of channels can be selected through which the

AD7938/AD7939 cycles with each consecutive conversion after

the write to the shadow register. To select a sequence of

channels to be converted, if operating in single-ended mode or

Pseudo Mode 2, the associated channel bit in the shadow

operating in fully differential mode or Pseudo Mode 1, the

associated pair of channel bits must be set for each pair of

analog inputs required in the sequence. With each consecutive

CONVST pulse after the sequencer has been set up, the

AD7938/AD7939 progress through the selected channels in

ascending order, beginning with the lowest channel. This

continues until a write operation occurs with the SEQ and

SHDW bits configured in any way except 1, 0 (see Table 11).

When a sequence is set up in fully differential mode or Pseudo

Mode 1, the ADC does not convert on the inverse pairs (that is,

VIN1, VIN0). The bit functions of the shadow register are

outlined in Table 12. See the Analog Input Selection section for

further information on using the sequencer.

Table 12. Shadow Register Bit Functions

MSB

LSB

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

VIN7

VIN6

VIN5

VIN4

VIN3

VIN2

VIN1

VIN0

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