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STM32F030F4 датащи(PDF) 58 Page - STMicroelectronics

номер детали STM32F030F4
подробное описание детали  Value-line ARM-based 32-bit MCU with 16 to 64-KB Flash, timers, ADC, communication interfaces, 2.4-3.6 V operation
PDF  88 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32F030F4 датащи(HTML) 58 Page - STMicroelectronics

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Electrical characteristics
STM32F030x4 STM32F030x6 STM32F030x8
58/88
DocID024849 Rev 1
All I/Os are CMOS and TTL compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters. The
coverage of these requirements is shown in Figure 16 for standard I/Os, and in Figure 17 for
5 V tolerant I/Os.
VIH
High level input
voltage
TC and TTa I/O
0.445 VDD+0.398
(1)
--
V
FT and FTf I/O
0.5 VDD+0.2
(1)
--
BOOT0
0.2 VDD+0.95
(1)
--
All I/Os except BOOT0 pin
0.7 VDD
--
Vhys
Schmitt trigger
hysteresis
TC and TTa I/O
-
200(1)
-
mV
FT and FTf I/O
-
100(1)
-
BOOT0
-
300(1)
-
Ilkg
Input leakage
current (2)
TC, FT and FTf I/O
TTa in digital mode
VSS VIN VDD
--
 0.1
µA
TTa in digital mode
VDD VIN VDDA
--
1
TTa in analog mode
VSS VIN VDDA
--
 0.2
FT and FTf I/O (3)
VDD VIN 5V
--
10
RPU
Weak pull-up
equivalent
resistor (4)
VIN VSS
25
40
55
k
RPD
Weak pull-down
equivalent
resistor (4)
VIN VDD
25
40
55
k
CIO
I/O pin
capacitance
-5
-
pF
1. Data based on design simulation only. Not tested in production.
2. Leakage could be higher than maximum value, if negative current is injected on adjacent pins. Refer to
Table 43: I/O current injection susceptibility.
3. To sustain a voltage higher than VDD +0.3 V, the internal pull-up/pull-down resistors must be disabled.
4. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS.
This MOS/NMOS contribution to the series resistance is minimum (~10% order).
Table 44. I/O static characteristics (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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