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TLK105 датащи(PDF) 21 Page - Texas Instruments

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номер детали TLK105
подробное описание детали  Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer Transceiver
PDF  99 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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TLK105 датащи(HTML) 21 Page - Texas Instruments

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background image
MDC
Z
Z
MDIO
(STA)
TA
Register Data
Z
Z
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
1
0
0
0
1
0
Idle
Idle
Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
MDC
TA
Register Data
Z
Z
Z
Z
Z
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
Idle
Z
Z
MDIO
(STA)
MDIO
(PHY)
Idle
Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TLK105
TLK106
www.ti.com
SLLSEB8A – AUGUST 2012 – REVISED MARCH 2013
For write transactions, the station-management entity writes data to the addressed TLK10x, thus
eliminating the requirement for MDIO Turnaround. The Turnaround time is filled by the management entity
by inserting <10>. Figure 4-4 shows the timing relationship for a typical MII register write access. The
frame structure and general read/write transactions are shown in Table 4-2, Figure 4-3, and Figure 4-4.
Table 4-2. Typical MDIO Frame Format
MII Management Serial Protocol
<idle><start><op code><device addr><reg addr><turnaround><data><idle>
Read Operation
<idle><01><10><AAAAA><RRRRR><Z0><xxxx xxxx xxxx xxxx><idle>
Write Operation
<idle><01><01><AAAAA><RRRRR><10><xxxx xxxx xxxx xxxx><idle>
Figure 4-3. Typical MDC/MDIO Read Operation
Figure 4-4. Typical MDC/MDIO Write Operation
Copyright © 2012–2013, Texas Instruments Incorporated
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