V+

D+

D-

GND

Ground or V+ layer

on bottom and/or

top, if possible.

TMP451

SBOS686 – JUNE 2013

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temperature that the TMP451 is measuring. Additionally, the internal power dissipation of the TMP451 can cause

the temperature to rise above the ambient or PCB temperature. The internal power dissipated as a result of

exciting the remote temperature sensor is negligible because of the small currents used. For a 3.3-V supply and

LAYOUT CONSIDERATIONS

Remote temperature sensing on the TMP451 measures very small voltages using very low currents; therefore,

noise at the device inputs must be minimized. Most applications using the TMP451 have high digital content, with

several clocks and logic level transitions creating a noisy environment. Layout should adhere to the following

guidelines:

1. Place the TMP451 as close to the remote junction sensor as possible.

2. Route the D+ and D– traces next to each other and shield them from adjacent signals through the use of

ground guard traces; see Figure 19. If a multilayer PCB is used, bury these traces between ground or V+

planes to shield them from extrinsic noise sources. 5 mil (0.127 mm) PCB traces are recommended.

3. Minimize additional thermocouple junctions caused by copper-to-solder connections. If these junctions are

used, make the same number and approximate locations of copper-to-solder connections in both the D+ and

D– connections to cancel any thermocouple effects.

4. Use a 0.1

μF local bypass capacitor directly between the V+ and GND of the TMP451. For optimum

measurement performance, minimize filter capacitance between D+ and D– to 1000 pF or less . This

capacitance includes any cable capacitance between the remote temperature sensor and the TMP451.

5. If the connection between the remote temperature sensor and the TMP451 is less than 8 in (20.32 cm) long,

use a twisted-wire pair connection. For lengths greater than 8 in, use a twisted, shielded pair with the shield

grounded as close to the TMP451 as possible. Leave the remote sensor connection end of the shield wire

open to avoid ground loops and 60-Hz pickup.

6. Thoroughly clean and remove all flux residue in and around the pins of the TMP451 to avoid temperature

offset readings as a result of leakage paths between D+ and GND, or between D+ and V+.

NOTE: Use minimum 5 mil (0.127 mm) traces with 5 mil spacing.

Figure 19. Suggested PCB Layer Cross-Section

22

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