TMP108

SBOS663 – APRIL 2013

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SERIAL INTERFACE

The TMP108 operates as a slave device only on the two-wire bus and SMBus. Connections to the bus are made

using the open-drain I/O lines, SDA and SCL. The SDA and SCL pins feature integrated spike-suppression filters

and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP108 supports the

transmission protocol for both fast (1 kHz to 400 kHz) and high-speed (1 kHz to 3.4 MHz) modes. All data bytes

are transmitted MSB first.

SERIAL BUS ADDRESS

To communicate with the TMP108, the master must first communicate with slave devices using a slave address

byte. The slave address byte consists of seven address bits, and a direction bit indicating the intent of executing

either a read or write operation. The TMP108 features an address pin that allows up to four devices to be

addressed on a single bus. The TMP108 latches the status of the address pin at the start of a communication.

Table 11 describes the pin logic levels and the corresponding address values. Other values for the fixed address

bits are available by request.

Table 11. Address Pin and Slave Addresses

DEVICE TWO-WIRE ADDRESS

A0 PIN CONNECTION

1001000

Ground

1001001

V+

1001010

SDA

1001011

SCL

BUS OVERVIEW

The device that initiates the transfer is called a master, and the devices controlled by the master are slaves. The

bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and

generates the start and stop conditions.

To address a specific device, initiate a start condition by pulling the data line (SDA) from a high to a low logic

level while SCL is high. All slaves on the bus shift in the slave address byte; the last bit indicates whether a read

or write operation follows. During the ninth clock pulse, the slave being addressed responds to the master by

generating an acknowledge bit and pulling SDA low.

Data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During data

transfer, SDA must remain stable while SCL is high because any change in SDA while SCL is high is interpreted

as a start or stop signal.

After all data have been transferred, the master generates a stop condition indicated by pulling SDA from low to

high, while SCL is high.

WRITING/READING OPERATION

Accessing a particular register on the TMP108 is accomplished by writing the appropriate value to the pointer

register. The value for the pointer register is the first byte transferred after the slave address byte with the R/W

bit low. Every write operation to the TMP108 requires a value for the pointer register (see Figure 13).

When reading from the TMP108, the last value stored in the pointer register by a write operation is used to

determine which register is read by a read operation. To change the register pointer for a read operation, a new

value must be written to the pointer register. This action is accomplished by issuing a slave address byte with the

R/W bit low, followed by the pointer register byte. No additional data are required. The master can then generate

a start condition and send the slave address byte with the R/W bit high to initiate the read command. See

Figure 14 for details of this sequence. If repeated reads from the same register are desired, it is not necessary to

continually send the pointer register bytes because the TMP108 stores the pointer register value until it is

changed by the next write operation.

Note that register bytes are sent with the most significant byte first, followed by the least significant byte.

12

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