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System Management Interface Signals — Intel® 82575EB Gigabit Ethernet Controller

317679-004

Intel® 82575EB Gigabit Ethernet Controller

Revision: 2.11

Datasheet

January 2011

3.4

System Management Interface Signals

3.5

MDIO Signals

3.6

SPI EEPROM and FLASH Signals

Symbol

Type

Name and Function

SMBCLK

SMB Clock

The SMB Clock signal is an open drain signals for the serial SMB interface.

SMBD

SMB Data

The SMB Data signal is an open drain signal for the serial SMB interface.

SMBALRT_N

SMB Alert

The SMB Alert signal is an open drain signal for serial SMB Port A.It acts as an alert input in

82559 compatible mode.

NCSI_CLK_IN

NCSI Reference Clock Input. Synchronous clock reference for receive, transmit and control

interface. It is a 50MHz clock /- 50 ppm.

NCSI_CLK_OUT

NCSI Reference Clock Output. Synchronous clock reference for receive, transmit and

control interface. It is a 50MHz clock /- 50 ppm. Serves as a clock source to the BMC and

the 82575EB (when configured so).

NCSI_CRS_DV

Carrier Sense / Receive Data Valid

NCSI_RXD[1]

NCSI_RXD[0]

Receive Data. Data signals from the device to the BMC

NCSI_TX_EN

Transmit Enable

NCSI_TXD[1]

NCSI_TXD[0]

Transmit Data. Data signals from BMC to the device

Symbol

Type

Name and Function

MDC

Management Data Clock. Used by the PHY as a clock timing reference for information transfer on

the MDIO signal. The MDC is not required to be a continuous signal and can be frozen when no

management data is transferred. The MDC signal has a maximum operating frequency of

2.5MHz.

MDIO

I/O

Management Data I/O. This internal signaling between the MAC and PHY logically represents a

bi-directional data signal used to transfer control information and status to and from the PHY (to

read and write the PHY management registers ). Asserting and interpreting value(s) on this

interface requires knowledge of the special MDIO protocol to avoid possible internal signal

contention or miscommunication to/from the PHY

Symbol

Type

Name and Function

EE_DI

EEPROM Data Input

The EEPROM Data Input pin is used for output to the SPI EEPROM memory device.

EE_DO

EEPROM Data Output

The EEPROM Data Output pin is used for input from the SPI EEPROM memory device. The EE_DO

includes an internal pull-up resistor.

EE_CS_N

EEPROM Chip Select

The EEPROM Chip Select signal is used to enable the device.

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