Product Brief

Features

Benefits

PCI Bus Features

I

PCI revision 2.3, 32-bit, 33/66MHz

I

Application flexibility in LOM or embedded use

I

CLKRUN# Signal

I

PCI clock suspension for low-power mobile design

Gigabit MAC/PHY Advanced Features

I

64KB configurable RX and TX packet FIFO

I

FIFO size tunable to the application

I

IEEE 802.3x-compliant flow-control support with software-controllable thresholds

I

Reduced frame loss due to receive FIFO overrun

I

Programmable host memory receive buffers (256B to 16KB)

I

Efficient usage of system resources

I

IEEE 802.3ab Auto-Negotiation

I

Automatic link configuration including speed, duplex, and flow control

I

State-of-the-art DSP/analog architecture

I

Implements digital adaptive equalization, echo, cross-talk and baseline wander cancellation

I

PHY detects polarity, MDI-X, 2 pair vs. 4 pair cables

I

Easier network installation and maintenance

Host Offloading Features

I

TCP segmentation (LSO), TCP and UDP checksum off-loading

I

Increased throughput and lower CPU utilization. Compatible with large send offload

on RX and TX feature found in Windows* 2000 and Windows* XP

I

IEEE 802.1Q VLAN support with VLAN tag insertion and stripping and packet

I

Enables IT staff to easily create multiple virtual LAN segments

filtering for up to 4096 VLAN tags

I

Jumbo frame support up to 16KB

I

High throughput for large data transfers on networks supporting jumbo frames

I

Interrupt moderation controls

I

Reduces the number of interrupts generated by receive and transmit operations

Manageability Features

I

On-chip SMBus 2.0 port

I

Enables IPMI and ASF implementations

I

ASF 1.0 and 2.0

I

Provides advanced alerting and remote-control capabilities with industry-standard interfaces

I

Compliance with PCI Power Management v1.1/ACPI v2.0

I

PCI power management capability requirements for PC and embedded applications

I

Wake on LAN* (WoL) support

I

Packet recognition and wakeup for network adapter and LOM applications

without software configuration

I

Automatic link speed switching from 1000Mb/s down to 10 or 100Mb/s in standby

I

Supports power-down states without software assistance

I

Low power in standby states

I

Smart Power Down mode when no signal is detected on the wire

I

Enables very low-power mobile or battery

I

Power Save mode switches link speed from 1000Mb/s down to 10 or 100Mb/s

I

Manages power consumption based on power source

when on battery power

I

Longer battery life for battery-powered implementations

Additional Device Features

I

Four programmable LED outputs

I

Customizable indications for link speed, activity, duplex, collisions, and port ID on each port

I

On-chip power regulator control circuitry

I

Simplified low-cost power supply design

I

BIOS LAN Disable Pin

I

Enables low-power LAN disable for LOM applications

Characteristics

Electrical

Environmental

Physical

Gigabit Ethernet Controllers

Order Code

Information in this document is provided in connection with Intel

by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied

warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent,

copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications

and product descriptions at any time, without notice.

Copyright © 2004 Intel Corporation. All rights reserved.

Intel, the Intel logo and Intel SingleDriver are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.

* Other names and brands may be claimed as the property of others.

Printed in USA.

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