ATSAM3N0BA-MU datasheet(47/60 Pages) ATMEL

47 / 60 page

11011BS–ATARM–22-Feb-12

SAM3N Summary

– Support for two PDC channels with connection to receiver and transmitter (for

UART0 only)

12.4

USART

• Programmable Baud Rate Generator

• 5- to 9-bit full-duplex synchronous or asynchronous serial communications

– 1, 1.5 or 2 stop bits in Asynchronous Mode or 1 or 2 stop bits in Synchronous Mode

– Parity generation and error detection

– Framing error detection, overrun error detection

– MSB- or LSB-first

– Optional break generation and detection

– By 8 or by-16 over-sampling receiver frequency

– Hardware handshaking RTS-CTS

– Receiver time-out and transmitter timeguard

– Optional Multi-drop Mode with address generation and detection

• RS485 with driver control signal

• ISO7816, T = 0 or T = 1 Protocols for interfacing with smart cards (Only on USART0)

– NACK handling, error counter with repetition and iteration limit

• SPI Mode

–Master or Slave

– Serial Clock programmable Phase and Polarity

– SPI Serial Clock (SCK) Frequency up to MCK/4

• IrDA modulation and demodulation (Only on USART0)

– Communication at up to 115.2 Kbps

• Test Modes

– Remote Loopback, Local Loopback, Automatic Echo

• PDC support (for USART0 only)

12.5

Timer Counter (TC)

• Six 16-bit Timer Counter Channels

• Wide range of functions including:

– Frequency Measurement

– Event Counting

– Interval Measurement

– Pulse Generation

–Delay Timing

– Pulse Width Modulation

– Up/down Capabilities

• Each channel is user-configurable and contains:

– Three external clock inputs

– Five internal clock inputs

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