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CY8C56LP датащи(PDF) 77 Page - Cypress Semiconductor

номер детали CY8C56LP
подробное описание детали  Programmable System-on-Chip (PSoC짰)
PDF  120 Pages
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производитель  CYPRESS [Cypress Semiconductor]
домашняя страница  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY8C56LP датащи(HTML) 77 Page - Cypress Semiconductor

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PSoC® 5LP: CY8C56LP Family
Datasheet
Document Number: 001-84935 Rev. *C
Page 77 of 120
11.5 Analog Peripherals
Specifications are valid for –40 °C
≤ TA ≤ 85 °C and TJ ≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
except where noted.
11.5.1 Opamp
Figure 11-19. Opamp Voffset Histogram, 3388 samples/847
parts, 25 °C, VDDA = 5 V
Figure 11-20. Opamp Voffset vs Temperature, VDDA = 5V
Table 11-18. Opamp DC Specifications
Parameter
Description
Conditions
Min
Typ
Max
Units
VI
Input voltage range
VSSA
–VDDA
V
Vos
Input offset voltage
2.5
mV
Operating temperature –40 °C to
70 °C
––
2
mV
TCVos
Input offset voltage drift with temperature Power mode = high
±30
µV / °C
Ge1
Gain error, unity gain buffer mode
Rload = 1 k
Ω
––
±0.1
%
Cin
Input capacitance
Routing from pin
18
pF
Vo
Output voltage range
1 mA, source or sink, power mode
= high
VSSA + 0.05
VDDA – 0.05
V
Iout
Output current capability, source or sink VSSA + 500 mV ≤ Vout ≤ VDDA
–500 mV, VDDA > 2.7 V
25
mA
VSSA + 500 mV ≤ Vout ≤ VDDA
–500 mV, 1.7 V = VDDA ≤ 2.7 V
16
mA
Idd
Quiescent current[39]
Power mode = min
250
400
uA
Power mode = low
250
400
uA
Power mode = med
330
950
uA
Power mode = high
1000
2500
uA
CMRR
Common mode rejection ratio[39]
80
dB
PSRR
Power supply rejection ratio[39]
VDDA ≥ 2.7 V
85
dB
VDDA < 2.7 V
70
dB
Note
39. Based on device characterization (Not production tested).



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