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OMAP3530ECBC датащи(PDF) 194 Page - Texas Instruments

номер детали OMAP3530ECBC
подробное описание детали  OMAP3530/25 Applications Processor: OMAP 3 Architecture
PDF  264 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

OMAP3530ECBC датащи(HTML) 194 Page - Texas Instruments

Back Button OMAP3530ECBC Datasheet HTML 190Page - Texas Instruments OMAP3530ECBC Datasheet HTML 191Page - Texas Instruments OMAP3530ECBC Datasheet HTML 192Page - Texas Instruments OMAP3530ECBC Datasheet HTML 193Page - Texas Instruments OMAP3530ECBC Datasheet HTML 194Page - Texas Instruments OMAP3530ECBC Datasheet HTML 195Page - Texas Instruments OMAP3530ECBC Datasheet HTML 196Page - Texas Instruments OMAP3530ECBC Datasheet HTML 197Page - Texas Instruments OMAP3530ECBC Datasheet HTML 198Page - Texas Instruments Next Button
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background image
cam_xclki
cam_pclk
cam_d[9:0]
SOF
D(0)
D(n-1)
EOF
SOF
D(0)
D(n-1)
EOF
ISP15
ISP16
ISP16
ISP17
ISP23
ISP24
ISP18
ISP18
030-058
OMAP3530/25 Applications Processor
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
www.ti.com
Figure 6-27. ISP – ITU Mode(1)(2)
(1) The unused lines must be grounded and the data bus must be connected to the lower data lines. It is possible to shift the data to 0, 2, or
4 data internal lanes. The different configurations are: cam_d[11:4] or cam_d[7:0] in 8-bit mode and cam_d[11:2] or cam_d[9:0] in 10-bit
mode.
(2) The parallel camera in ITU mode supports progressive camera modules.
194
TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
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