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M93C76M93C76-R датащи(PDF) 16 Page - STMicroelectronics |
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M93C76M93C76-R датащи(HTML) 16 Page - STMicroelectronics |
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16 / 33 page ![]() Instructions M93C86xx M93C76xx M93C66xx M93C56xx M93C46xx 16/33 DocID4997 Rev 13 5.2.4 Erase Byte or Word The Erase Byte or Word (ERASE) instruction sets the bits of the addressed memory byte (or word) to 1. Once the address has been correctly decoded, the falling edge of the Chip Select Input (S) starts the self-timed Erase cycle. The completion of the cycle can be detected by monitoring the READY/BUSY line, as described in Section 6: READY/BUSY status. Figure 6. ERASE, ERAL sequences 1. For the meanings of An and Xn, please see Table 4, Table 5 and Table 6. 5.2.5 Erase All The Erase All Memory (ERAL) instruction erases the whole memory (all memory bits are set to 1). The format of the instruction requires that a dummy address be provided. The Erase cycle is conducted in the same way as the Erase instruction (ERASE). The completion of the cycle can be detected by monitoring the READY/BUSY line, as described in Section 6: READY/BUSY status. AI00879B S ERASE 1 1 D Q ADDR OP CODE 1 BUSY READY CHECK STATUS S ERASE ALL 1 0 D Q OP CODE 1 BUSY READY CHECK STATUS 0 0 An A0 Xn X0 ADDR |
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