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HT24LC256 датащи(PDF) 2 Page - Holtek Semiconductor Inc

номер детали HT24LC256
подробное описание детали  CMOS 256K 2-Wire Serial EEPROM
PDF  12 Pages
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производитель  HOLTEK [Holtek Semiconductor Inc]
домашняя страница  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT24LC256 датащи(HTML) 2 Page - Holtek Semiconductor Inc

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Rev. 1.00
2
January 29, 2013
HT24LC256
Absolute Maximum Ratings
SupplyVoltage........................VSS−0.3VtoVSS+3.0V
StorageTemperature..................-50°Cto125°C
InputVoltage...........................VSS−0.3VtoVCC+0.3V
OperatingTemperature..................-40°Cto85°C
Note:Thesearestressratingsonly.Stressesexceedingtherangespecifiedunder“AbsoluteMaximumRatings”
maycausesubstantialdamagetothedevice.Functionaloperationofthisdeviceatotherconditionsbeyond
thoselistedinthespecificationisnotimpliedandprolongedexposuretoextremeconditionsmayaffect
devicereliability.
D.C Characteristics
Ta=-40ºCto85ºC
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VCC
Conditions
VCC
Operating Voltage
2.2
5.5
V
ICC1
Operating Current
5V
Read at 100kHz
2
mA
ICC2
Operating Current
5V
Write at 100kHz
5
mA
VIL
Input Low Voltage
-1
0.3VCC
V
VIH
Input High Voltage
0.7VCC
VCC+0.5
V
VOL
Output Low Voltage
2.4V
IOL=2.1mA
0.4
V
ILI
Input Leakage Current
5V
VIN=0 or VCC
0.1
2
μA
ILO
Output Leakage Current
5V
VOUT=0 or VCC
0.1
1
μA
ISTB1
Standby Current
5V
VIN=0 or VCC
3
μA
ISTB2
Standby Current
2.2V
VIN=0 or VCC
2
μA
CIN
Input Capacitance (See note)
fSK=1MHz @ 25˚C
6
pF
COUT
Output Capacitance (See note)
fSK=1MHz @ 25˚C
8
pF
Note:Theseparametersareperiodicallysampledbutnot100%tested.
A.C Characteristics
Ta=-40ºCto85ºC
Symbol
Parameter
Remark
VCC=2.2~5.5V VCC=2.5~5.5V
Unit
Min.
Max.
Min.
Max.
fSK
Clock Frequency
400
1000
kHz
tHIGH
Clock High Time
600
400
ns
tLOW
Clock Low Time
1200
600
ns
tr
SDA and SCL Rise Time
Note
300
300
ns
tf
SDA and SCL Fall Time
Note
300
300
ns
tHD:STA
START Condition Hold Time After this period the first clock pulse
is generated
600
250
ns
tSU:STA
START Condition Setup Time Only relevant for repeated START
condition
600
250
ns
tHD:DAT
Data Input Hold Time
0
0
ns
tSU:DAT
Data Input Setup Time
150
100
ns
tSU:STO
STOP Condition Setup Time
600
250
ns
tAA
Output Valid from Clock
900
600
ns
tBUF
Bus Free Time
Time in which the bus must be free
before a new transmission can start 1200
500
ns
tSP
Input Filter Time
(SDA and SCL Pins)
Noise suppression time
50
50
ns
tWR
Write Cycle Time
5
5
ms
Endurance 25ºC, Page Mode
5.0V
1,000,000
Write
Cycles
Note:Theseparametersareperiodicallysampledbutnot100%tested.Forrelativetiming,refertotimingdiagrams.



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