STM32F303VCT6 datasheet(42/132 Pages) STMICROELECTRONICS

42 / 132 page

Pinouts and pin description

STM32F302xx/STM32F303xx

42/132

DocID023353 Rev 6

PB6

I/O

FTf

I2C1_SCL, USART1_TX,

TIM16_CH1N, TIM4_CH1,

TIM8_CH1(4), TSC_G5_IO3,

TIM8_ETR(4), TIM8_BKIN2(4),

EVENTOUT

PB7

I/O

FTf

I2C1_SDA, USART1_RX,

TIM3_CH4, TIM4_CH2,

TIM17_CH1N, TIM8_BKIN(4),

TSC_G5_IO4, EVENTOUT

BOOT0

Boot memory selection

PB8

I/O

FTf

I2C1_SCL, CAN_RX,

TIM16_CH1, TIM4_CH3,

TIM8_CH2(4), TIM1_BKIN,

TSC_SYNC, COMP1_OUT,

EVENTOUT

PB9

I/O

FTf

I2C1_SDA, CAN_TX,

TIM17_CH1, TIM4_CH4,

TIM8_CH3(4), IR_OUT,

COMP2_OUT, EVENTOUT

PE0

I/O

(1)

USART1_TX, TIM4_ETR,

TIM16_CH1, EVENTOUT

PE1

I/O

(1)

USART1_RX, TIM17_CH1,

EVENTOUT

VSS_1

Ground

100

VDD_1

Digital power supply

1. Function availability depends on the chosen device.

When using the small packages (48 and 64 pin packages), the GPIO pins which are not present on these packages, must

not be configured in analog mode.

2. PC13, PC14 and PC15 are supplied through the power switch. Since the switch sinks only a limited amount of current

(3 mA), the use of GPIO PC13 to PC15 in output mode is limited:

- The speed should not exceed 2 MHz with a maximum load of 30 pF

- These GPIOs must not be used as current sources (e.g. to drive an LED).

After the first backup domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the

content of the Backup registers which is not reset by the main reset. For details on how to manage these GPIOs, refer to

the Battery backup domain and BKP register description sections in the reference manual.

3. The VREF+ functionality is available only on the 100 pin package. On the 64-pin and 48-pin packages, the VREF+ is

internally connected to VDDA.

4. On STM32F303xx devices only.

Table 11. STM32F302xx/STM32F303xx pin definitions (continued)

Pin number

Pin name

(function

after

reset)

Pin functions

Alternate functions

Additional functions

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