SC4524CSETRT datasheet(10/22 Pages) SAMTEC

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SC4524C

Applications Information (Cont.)

becomes armed. As the load draws more current from

the regulator, the current-limit comparator ILIM (Figure

2) will eventually limit the switch current on a cycle-by-

cycle basis. The over-current signal OC goes high, setting

the latch B

3. The soft-start capacitor is discharged with

D - IC) (Figure 3). If the inductor current falls below the

current limit and the PWM comparator instead turns off

the switch, then latch B

3 will be reset and IC will recharge

the soft-start capacitor. If over-current condition persists

or OC becomes asserted more often than PWM over

a period of time, then the soft-start capacitor will be

discharged below .9V. At this juncture, comparator B

sets the overload latch B

2. The soft-start capacitor will be

continuously discharged with (I

D - IC). The COMP pin is

immediately pulled to ground. The switching regulator is

shut off until the soft-start capacitor is discharged below

.0V. At this moment, the overload latch is reset. The

soft-start capacitor is recharged and the converter again

undergoes soft-start. The regulator will go through soft-

start, overload shutdown and restart until it is no longer

overloaded.

If the FB voltage falls below 0.8V because of output

overload, then the switching frequency will be reduced.

Frequency foldback helps to limit the inductor current

when the output is hard shorted to ground.

During normal operation, the soft-start capacitor is

charged to 2.4V.

Setting the Output Voltage

The regulator output voltage is set with an external

resistive divider (Figure ) with its center tap tied to the

FB pin. For a given R

6 value, R4 can be found by













−

Setting the Switching Frequency

The switching frequency of the SC4524C is set with an

external resistor from the ROSC pin to ground. Table 3

lists standard resistor values for typical frequency setting.

Table 3 — Resistor for Typical Switching Frequency

5.23

2000

11.0

1300

30.9

600

5.62

1900

12.4

1200

38.3

500

6.34

1800

14.0

1100

49.9

400

7.15

1700

15.8

1000

57.6

350

8.06

1600

18.2

900

69.8

300

8.87

1500

21.5

800

84.5

250

9.76

1400

25.5

700

110

200

ROSC (k)

Freq. (k)

ROSC (k)

Freq. (k)

ROSC (k)

Freq. (k)

Minimum On Time Consideration

The operating duty cycle of a non-synchronous step-

down switching regulator in continuous-conduction

mode (CCM) is given by

CESAT

−

where V

CESAT is the switch saturation voltage and VD is

voltage drop across the rectifying diode.

In peak current-mode control, the PWM modulating

ramp is the sensed current ramp of the power switch.

This current ramp is absent unless the switch is turned

on. The intersection of this ramp with the output of the

voltage feedback error amplifier determines the switch

pulse width. The propagation delay time required to

immediately turn off the switch after it is turned on is the

minimum controllable switch on time (T

ON(MIN)).

Closed-loop measurement shows that the SC4524C

minimum on time is about 20ns at room temperature

(Figure 4). If the required switch on time is shorter than

the minimum on time, the regulator will either skip cycles

or it will jitter.

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