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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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INTEDG датащи(PDF) 227 Page - Microchip Technology |
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INTEDG датащи(HTML) 227 Page - Microchip Technology |
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227 / 478 page  2010-2012 Microchip Technology Inc. DS41414D-page 227 PIC16(L)F1946/47 23.4.1 HALF-BRIDGE MODE In Half-Bridge mode, two pins are used as outputs to drive push-pull loads. The PWM output signal is output on the CCPx/PxA pin, while the complementary PWM output signal is output on the PxB pin (see Figure 23-9). This mode can be used for Half-Bridge applications, as shown in Figure 23-9, or for Full-Bridge applications, where four power switches are being modulated with two PWM signals. In Half-Bridge mode, the programmable dead-band delay can be used to prevent shoot-through current in Half-Bridge power devices. The value of the PDC<6:0> bits of the PWMxCON register sets the number of instruction cycles before the output is driven active. If the value is greater than the duty cycle, the corresponding output remains inactive during the entire cycle. See Section 23.4.5 “Programmable Dead-Band Delay Mode” for more details of the dead-band delay operations. Since the PxA and PxB outputs are multiplexed with the PORT data latches, the associated TRIS bits must be cleared to configure PxA and PxB as outputs. FIGURE 23-8: EXAMPLE OF HALF-BRIDGE PWM OUTPUT FIGURE 23-9: EXAMPLE OF HALF-BRIDGE APPLICATIONS Period Pulse Width td td (1) PxA(2) PxB(2) td = Dead-Band Delay Period (1) (1) Note 1: At this time, the TMRx register is equal to the PRx register. 2: Output signals are shown as active-high. PxA PxB FET Driver FET Driver Load + - + - FET Driver FET Driver V+ Load FET Driver FET Driver PxA PxB Standard Half-Bridge Circuit (“Push-Pull”) Half-Bridge Output Driving a Full-Bridge Circuit |
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