INTEDG datasheet(224/478 Pages) MICROCHIP

224 / 478 page

PIC16(L)F1946/47

DS41414D-page 224

 2010-2012 Microchip Technology Inc.

23.4

PWM (Enhanced Mode)

The enhanced PWM function described in this section is

available for CCP modules ECCP1, ECCP2 and

ECCP3, with any differences between modules noted.

The enhanced PWM mode generates a Pulse-Width

Modulation (PWM) signal on up to four different output

pins with up to 10 bits of resolution. The period, duty

cycle, and resolution are controlled by the following

registers:

•PRx registers

•TxCON registers

• CCPRxL registers

• CCPxCON registers

The ECCP modules have the following additional PWM

registers which control Auto-shutdown, Auto-restart,

Dead-band Delay and PWM Steering modes:

• CCPxAS registers

• PSTRxCON registers

• PWMxCON registers

The enhanced PWM module can generate the following

five PWM Output modes:

• Single PWM

• Half-Bridge PWM

• Full-Bridge PWM, Forward Mode

• Full-Bridge PWM, Reverse Mode

• Single PWM with PWM Steering Mode

To select an Enhanced PWM Output mode, the PxM bits

of the CCPxCON register must be configured

appropriately.

The PWM outputs are multiplexed with I/O pins and are

designated PxA, PxB, PxC and PxD. The polarity of the

PWM pins is configurable and is selected by setting the

CCPxM bits in the CCPxCON register appropriately.

Figure 23-5 shows an example of a simplified block

diagram of the Enhanced PWM module.

Table 23-9 shows the pin assignments for various

Enhanced PWM modes.

FIGURE 23-5:

EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE

Note 1:

The corresponding TRIS bit must be

cleared to enable the PWM output on the

CCPx pin.

Clearing the CCPxCON register will

relinquish control of the CCPx pin.

Any pin not used in the enhanced PWM

mode is available for alternate pin

functions, if applicable.

prevent the generation of an

incomplete waveform when the PWM is

first enabled, the ECCP module waits

until the start of a new PWM period

before generating a PWM signal.

CCPRxL

CCPRxH (Slave)

Comparator

TMRx

Comparator

PRx

(1)

Duty Cycle Registers

DCxB<1:0>

Clear Timer,

toggle PWM pin and

latch duty cycle

Note 1:

The 8-bit timer TMRx register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create the 10-bit time

base.

TRISx

CCPx/PxA

TRISx

PxB

TRISx

PxC

TRISx

PxD

Output

Controller

PxM<1:0>

CCPxM<3:0>

PWMxCON

CCPx/PxA

PxB

PxC

PxD

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