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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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PM6686TR датащи(PDF) 44 Page - STMicroelectronics |
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PM6686TR датащи(HTML) 44 Page - STMicroelectronics |
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44 / 50 page  Diode selection PM6686 44/50 Doc ID 15281 Rev 4 Typical components values are: C1 = 1 µF and C2 = 1 µF. 11.3.3 VREF2 and VREF3 capacitors A 10 nF to 100 nF ceramic capacitor on VREF2 pin must be added to ensure noise rejection. If VREF3 voltage is not used the pin can be left floating, otherwise a 10 nF to 100 nF bypass ceramic capacitor should be mounted. 11.3.4 LDO output capacitors Bypass the output of the linear regulator with 4,7 µF ceramic capacitor closer to the LDO pin. In most applicative conditions the ceramic output capacitor can be enough to ensure stability. 11.3.5 Bootstrap circuit The external bootstrap circuit is represented in the next figure: Figure 57. Bootstrap circuit The bootstrap circuit capacitor value CBOOT must provide the total gate charge to the high- side MOSFET during turn on phase. A typical value is 100 nF. A resistor RBOOT on the BOOT pin could be added in order to reduce noise when the phase node rises up, working like a gate resistor for the turn on phase of the high-side MOSFET. A typical value is RBOOT = 1 Ω. RBOOT PHASE CBOOT RBOOT L |
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