Protected LED Array Driver

A6263

9

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Dissipation Limits

There are two features limiting the power that can be dissipated

by the A6263: thermal shutdown and thermal foldback.

Thermal Shutdown

If the thermal foldback feature is disabled

by connecting the THTH pin to GND, or if the thermal resistance

from the A6263 to the ambient environment is high, then the

silicon temperature will rise to the thermal shutdown threshold

and the current will be disabled. After the current is disabled the

power dissipated will drop and the temperature will fall. When

the temperature falls by the hysteresis of the thermal shutdown

circuit, then the current will be re-enabled and the temperature

will start to rise again. This cycle will repeat continuously until

the ambient temperature drops or the A6263 is switched off. The

period of this thermal shutdown cycle will depend on several

electrical, mechanical, and thermal parameters, and could be from

a few milliseconds to a few seconds.

Thermal Foldback

If there is a good thermal connection to the

A6263, then the thermal foldback feature will have time to act.

This will limit the silicon temperature by reducing the regulated

current and therefore the dissipation. The thermal monitor will

reduce the LED current as the temperature of the A6263 increases

Thermal Dissipation

The amount of heat that can pass from the silicon of the A6263

to the surrounding ambient environment depends on the thermal

resistance of the structures connected to the A6263. The thermal

power dissipation and is usually measured in degrees Celsius per

watt (°C/W).

The temperature rise, ΔT, is calculated from the power dissipated,

(9)

mately 35°C/W can be achieved by mounting the A6263 on a

standard FR4 double-sided printed circuit board (PCB) with a

copper area of a few square inches on each side of the board

under the A6263. Additional improvements in the range of 20%

may be achieved by optimizing the PCB design.

Optimizing Thermal Layout

The features of the printed circuit board, including heat conduc-

tion and adjacent thermal sources such as other components,

have a very significant effect on the thermal performance of the

device. To optimize thermal performance, the following should

be taken into account:

• The device exposed thermal pad should be connected to as

much copper area as is available.

• Copper thickness should be as high as possible (for example,

2 oz. or greater for higher power applications).

• The greater the quantity of thermal vias, the better the dissipa-

tion. If the expense of vias is a concern, studies have shown

that concentrating the vias directly under the device in a tight

pattern, as shown in figure 5, has the greatest effect.

• Additional exposed copper area on the opposite side of the

board should be connected by means of the thermal vias. The

copper should cover as much area as possible.

• Other thermal sources should be placed as remote from the

device as possible

Ø0.3 mm via

Top-layer

exposed copper

Signal traces

LJ package

exposed

thermal pad

LJ package

footprint

0.7 mm

0.7 mm

Figure 5. Suggested PCB layout for thermal optimization

(maximum available bottom-layer copper recommended)