PIC32MX795F512L-80IPT datasheet(6/68 Pages) MICROCHIP

6 / 68 page

PIC32

DS61145L-page 6

 2007-2013 Microchip Technology Inc.

4.2

2-wire Interface

Another possible interface is the 2-wire ICSP port.

Table 4-2 lists the required pin connections. This

interface uses the following two communication lines to

transfer data to and from the PIC32 device being

programmed:

• PGECx – Serial Program Clock

• PGEDx – Serial Program Data

These signals are described in the following two

sections. Refer to the specific device data sheet for the

connection of the signals to the chip pins.

4.2.1

SERIAL PROGRAM CLOCK

(PGECX)

PGECx is the clock that controls the updating of the

TAP controller and the shifting of data through the

Instruction or selected Data register(s). PGECx is

independent of the processor clock, with respect to

both frequency and phase.

4.2.2

SERIAL PROGRAM DATA (PGEDX)

PGEDx is the data input/output to the Instruction or

selected Data Register(s), it is also the control signal

for the TAP controller. This signal is sampled on the

falling edge of PGECx for some TAP controller states.

TABLE 4-2:

2-WIRE INTERFACE PINS

Device

Pin Name

Programmer

Pin Name

Pin Type

Pin Description

MCLR

Programming Enable

ENVREG(2)

N/A

Enable for On-Chip Voltage Regulator

VDD and AVDD(1) VDD

Power Supply

VSS and AVSS(1)

VSS

Ground

VCAP

N/A

CPU logic filter capacitor connection

PGEC1

PGEC

Primary Programming Pin Pair: Serial Clock

PGED1

PGED

I/O

Primary Programming Pin Pair: Serial Data

PGEC2

PGEC

Secondary Programming Pin Pair: Serial Clock

PGED2

PGED

I/O

Secondary Programming Pin Pair: Serial Data

Legend: I = Input

O = Output

P = Power

Note 1:

All power supply and ground pins must be connected, including analog supplies (AVDD) and ground (AVSS).

The ENVREG pin is not available on all devices. Please refer to either the “Pin Diagrams” or “Pin

Tables” section in the specific device data sheet to determine availability.

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