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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8731SEDS/V датащи(PDF) 37 Page - Wolfson Microelectronics plc |
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WM8731SEDS/V датащи(HTML) 37 Page - Wolfson Microelectronics plc |
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37 / 65 page  WM8731 / WM8731L Production Data w PD, Rev 4.9, October 2012 37 LEFT CHANNEL RIGHT CHANNEL DACLRC/ ADCLRC BCLK DACDAT/ ADCDAT 1/fs n 3 2 1 n-2 n-1 LSB MSB n 3 2 1 n-2 n-1 LSB MSB 1 BCLK 1 BCLK Figure 27 I 2S Mode Right Justified mode is where the LSB is available on the rising edge of BCLK preceding a DACLRC or ADCLRC transition, yet MSB is still transmitted first. LEFT CHANNEL RIGHT CHANNEL DACLRC/ ADCLRC BCLK DACDAT/ ADCDAT 1/fs n 3 2 1 n-2 n-1 LSB MSB n 3 2 1 n-2 n-1 LSB MSB Figure 28 Right Justified Mode In DSP/PCM mode, the left channel MSB is available on either the 1 st (mode B) or 2nd (mode A) rising edge of BCLK (selectable by LRP) following a rising edge of LRC. Right channel data immediately follows left channel data. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles between the LSB of the right channel data and the next sample. Figure 29 DSP/PCM Mode Audio Interface (mode A, LRP=1) |
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