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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC855T датащи(PDF) 67 Page - Motorola, Inc |
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MPC855T датащи(HTML) 67 Page - Motorola, Inc |
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67 / 76 page  MOTOROLA MPC860 Family Hardware Specifications 67 MII Receive Signal Timing (MII_RXD[3:0], MII_RX_DV, MII_RX_ER, MII_RX_CLK) 13.1 MII Receive Signal Timing (MII_RXD[3:0], MII_RX_DV, MII_RX_ER, MII_RX_CLK) The receiver functions correctly up to a MII_RX_CLK maximum frequency of 25 MHz +1%. There is no minimum frequency requirement. In addition, the processor clock frequency must exceed the MII_RX_CLK frequency – 1%. Table 13-27 provides information on the MII receive signal timing. Figure 13-70 shows MII receive signal timing. Figure 13-70. MII Receive Signal Timing Diagram 13.2 MII Transmit Signal Timing (MII_TXD[3:0], MII_TX_EN, MII_TX_ER, MII_TX_CLK) The transmitter functions correctly up to a MII_TX_CLK maximum frequency of 25 MHz +1%. There is no minimum frequency requirement. In addition, the processor clock frequency must exceed the MII_TX_CLK frequency – 1%. Table 13-28 provides information on the MII transmit signal timing. Table 13-27. MII Receive Signal Timing Num Characteristic Min Max Unit M1 MII_RXD[3:0], MII_RX_DV, MII_RX_ER to MII_RX_CLK setup 5 — ns M2 MII_RX_CLK to MII_RXD[3:0], MII_RX_DV, MII_RX_ER hold 5 — ns M3 MII_RX_CLK pulse width high 35% 65% MII_RX_CLK period M4 MII_RX_CLK pulse width low 35% 65% MII_RX_CLK period M1 M2 MII_RX_CLK (Input) MII_RXD[3:0] (Inputs) MII_RX_DV MII_RX_ER M3 M4 |
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