STM32F103XF datasheet(21/120 Pages) STMICROELECTRONICS

21 / 120 page

STM32F103xF, STM32F103xG

Description

Doc ID 16554 Rev 3

21/120

Basic timers TIM6 and TIM7

These timers are mainly used for DAC trigger generation. They can also be used as a

generic 16-bit time base.

Independent watchdog

The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is

clocked from an independent 40 kHz internal RC and as it operates independently from the

main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog

to reset the device when a problem occurs, or as a free running timer for application timeout

management. It is hardware or software configurable through the option bytes. The counter

can be frozen in debug mode.

Window watchdog

The window watchdog is based on a 7-bit downcounter that can be set as free running. It

can be used as a watchdog to reset the device when a problem occurs. It is clocked from the

main clock. It has an early warning interrupt capability and the counter can be frozen in

debug mode.

SysTick timer

This timer is dedicated to real-time operating systems, but could also be used as a standard

down counter. It features:

●

A 24-bit down counter

●

Autoreload capability

●

Maskable system interrupt generation when the counter reaches 0.

●

Programmable clock source

2.3.19

I²C bus

Up to two I²C bus interfaces can operate in multimaster and slave modes. They can support

standard and fast modes.

They support 7/10-bit addressing mode and 7-bit dual addressing mode (as slave). A

hardware CRC generation/verification is embedded.

They can be served by DMA and they support SMBus 2.0/PMBus.

2.3.20

Universal synchronous/asynchronous receiver transmitters (USARTs)

The STM32F103xF and STM32F103xG performance line embeds three universal

synchronous/asynchronous receiver transmitters (USART1, USART2 and USART3) and

two universal asynchronous receiver transmitters (UART4 and UART5).

These five interfaces provide asynchronous communication, IrDA SIR ENDEC support,

multiprocessor communication mode, single-wire half-duplex communication mode and

have LIN Master/Slave capability.

The USART1 interface is able to communicate at speeds of up to 4.5 Mbit/s. The other

available interfaces communicate at up to 2.25 Mbit/s.

USART1, USART2 and USART3 also provide hardware management of the CTS and RTS

signals, Smart Card mode (ISO 7816 compliant) and SPI-like communication capability. All

interfaces can be served by the DMA controller except for UART5.

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