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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32F407IG датащи(PDF) 122 Page - STMicroelectronics |
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STM32F407IG датащи(HTML) 122 Page - STMicroelectronics |
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122 / 167 page  Electrical characteristics STM32F405xx, STM32F407xx 122/167 Doc ID 022152 Rev 2 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 49 or Figure 50, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed them as close as possible to the chip. Figure 49. Power supply and reference decoupling (VREF+ not connected to VDDA) 1. VREF+ and VREF– inputs are both available on UFBGA176. VREF+ is also available on LQFP100, LQFP144, and LQFP176. When VREF+ and VREF– are not available, they are internally connected to VDDA and VSSA. Figure 50. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF– inputs are both available on UFBGA176. VREF+ is also available on LQFP100, LQFP144, and LQFP176. When VREF+ and VREF– are not available, they are internally connected to VDDA and VSSA. V REF+ STM32F V DDA V SSA/V REF- 1 µF // 10 nF 1 µF // 10 nF ai17535 (See note 1) (See note 1) VREF+/VDDA STM32F 1 µF // 10 nF VREF–/VSSA ai17536 (See note 1) (See note 1) |
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