PCF2129T datasheet(16/73 Pages) NXP

16 / 73 page

PCF2129T

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Product data sheet

Rev. 3 — 12 February 2013

16 of 73

NXP Semiconductors

PCF2129T

Accurate RTC with integrated quartz crystal for industrial

When a power failure condition occurs and the power supply switches to the battery, the

following sequence occurs:

1. The battery switch flag BF (register Control_3) is set logic 1.

2. An interrupt is generated if the control bit BIE (register Control_3) is enabled

(see Section 8.12.6).

3. If the control bit BTSE (register Control_3) is logic 1, the timestamp registers store the

time and date when the battery switch occurred (see Section 8.11.4).

4. The battery switch flag BF is cleared by command; it must be cleared to clear the

interrupt.

The interface is disabled in battery backup operation:

• Interface inputs are not recognized, preventing extraneous data being written to the

device

• Interface outputs are high-impedance

8.5.1.1

Standard mode

If VDD > VBAT OR VDD >Vth(sw)bat, the internal power supply is VDD.

If VDD < VBAT AND VDD <Vth(sw)bat, the internal power supply is VBAT.

8.5.1.2

Direct switching mode

If VDD > VBAT the internal power supply is VDD.

If VDD < VBAT the internal power supply is VBAT.

Vth(sw)bat is the battery switch threshold voltage. Typical value is 2.5 V. In standard mode, the

battery switch-over works only for VDD > 2.5 V.

VDD may be lower than VBAT (for example VDD =3V, VBAT =4.1 V).

Fig 4.

Battery switch-over behavior in standard mode with bit BIE set logic 1 (enabled)

001aaj311

internal power supply (= VBBS)

cleared via interface

backup battery operation

Vth(sw)bat

(= 2.5 V)

VDD (= 0 V)

VBAT

VDD

VBBS

INT

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