LIS2DH datasheet(36/50 Pages) STMICROELECTRONICS

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Registers Description

LIS2DH

36/49

Doc ID 022516 Rev 1

7.10

CTRL_REG5 (24h)

7.11

CTRL_REG6 (25h)

Table 37.

CTRL_REG5 register

BOOT

FIFO_EN

LIR_INT1

D4D_INT1

LIR_INT2

D4D_INT2

Table 38.

CTRL_REG5 description

BOOT

Reboot memory content. Default value: 0

(0: Normal mode; 1: reboot memory content)

FIFO_EN

FIFO enable. Default value: 0

(0: FIFO disable; 1: FIFO Enable)

LIR_INT1

Latch interrupt request on INT1_SRC register, with INT1_SRC register cleared by

reading INT1_SRC itself. Default value: 0.

(0: interrupt request not latched; 1: interrupt request latched)

D4D_INT1

4D enable: 4D detection is enabled on INT1 pin when 6D bit on INT1_CFG is set to

LIR_INT2

Latch interrupt request on INT2_SRC register, with INT2_SRC register cleared by

reading INT2_SRC itself. Default value: 0.

(0: interrupt request not latched; 1: interrupt request latched)

D4D_INT2

4D enable: 4D detection is enabled on INT2 pin when 6D bit on INT2_CFG is set to

Table 39.

CTRL_REG6 register

I2_CLICKen I2_INT1

I2_INT2

BOOT_I2

P2_ACT

- -

H_LACTIVE

Table 40.

CTRL_REG6 description

I2_CLICKen

Click interrupt on INT2 pin. Default value: 0

(0: disable; 1: enable)

I2_INT1

Interrupt 1 function enabled on INT2 pin. Default value: 0

(0: function disable; 1: function enable)

I2_INT2

Interrupt 2 function enabled on INT2 pin. Default value: 0

(0: function disable; 1: function enable)

BOOT_I2

Boot on INT2 pin enable. Default value: 0

(0: disable; 1:enable)

P2_ACT

Activity interrupt enable on INT2 pin. Default value: 0.

(0: disable; 1:enable)

H_LACTIVE

interrupt active. Default value: 0.

(0: interrupt active high; 1: interrupt active low)

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