6

SCDCT1775 Rev B

012345

6

8

9

10

11

12

13

14

15

16

18

19

0

SERIAL DATA OUT

SYNC

15

14

13

12

11

10

9876

54321

0

P

19

7

17

DON’T CARE

DON’T CARE

DON’T CARE

DON’T CARE

DON’T CARE

DON’T CARE

DON’T CARE

ESE OUT

ENC ENABLE

SYNC SEL

SEND DATA

(LOAD DATA)

LATCH DATA

TRI-STATE DATA

DATA SELECT

STROBE DATA

END CYCLE

VALID SYNC

STROBE

CYCLE

START

VALID DATA

16µs

DATA SENT

SYNC

FIGURE 2 – TRANSMIT MODE TIMING

012

345

6

8910

11

12

13

14

15

16

18

19

0

19

7

17

12

4

5

3

SERIAL DATA IN

SYNC

15

14

13

12

11

10

9

8765

432

10

P

SYNC

15

14

13

TAKE DATA

16µs

PREVIOUS STATE

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

UNDEFINED

15

DON’T CARE

DSC OUT

COMM / DATA SYNC

SERIAL DATA OUT

END CYCLE

TAKE DATA

START CYCLE

STROBE DATA

PREVIOUS STATE

CURRENT SYNC

CURRENT DATA

NOT VALID

PREVIOUS STATE

PREVIOUS STATE

NOT VALID

FLAGS VALID

3

NOTES:

1. Parallel data is held continuously in second rank receiver register, and may be enabled onto the tri-state output at any time with a LOW on DATA SELECT.

2. VALID WORD will remainLOW for 20µsec then go HIGH, if a valid sync is not received.

3. FLAG OUTPUTS are valid only when VALID WORD is LOW. Flags are MODE CODE, RT Enable, BROADCAST and VAL CMD WD.

4. BIT STATUS is valid only if wraparound transmit plus receive cycle has been performed. LATCH DATA must be HIGH, and either S/T SELECT or

RX STROBE must be HIGH for the full wraparound cycle duration.

FIGURE 3 – RECEIVE MODE TIMING