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ACT-SF512K32 датащи(PDF) 3 Page - Aeroflex Circuit Technology

номер детали ACT-SF512K32
подробное описание детали  ACT-SF512K32 High Speed 512Kx32 SRAM / 512Kx32 Flash Multichip Module
PDF  11 Pages
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производитель  AEROFLEX [Aeroflex Circuit Technology]
домашняя страница  http://www.aeroflex.com
Logo AEROFLEX - Aeroflex Circuit Technology

ACT-SF512K32 датащи(HTML) 3 Page - Aeroflex Circuit Technology

  ACT-SF512K32 Datasheet HTML 1Page - Aeroflex Circuit Technology ACT-SF512K32 Datasheet HTML 2Page - Aeroflex Circuit Technology ACT-SF512K32 Datasheet HTML 3Page - Aeroflex Circuit Technology ACT-SF512K32 Datasheet HTML 4Page - Aeroflex Circuit Technology ACT-SF512K32 Datasheet HTML 5Page - Aeroflex Circuit Technology ACT-SF512K32 Datasheet HTML 6Page - Aeroflex Circuit Technology ACT-SF512K32 Datasheet HTML 7Page - Aeroflex Circuit Technology ACT-SF512K32 Datasheet HTML 8Page - Aeroflex Circuit Technology ACT-SF512K32 Datasheet HTML 9Page - Aeroflex Circuit Technology Next Button
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Aeroflex Circuit Technology
SCD3852 REV A 5/20/98
Plainview NY (516) 694-6700
3
SRAM AC Characteristics
(VCC = 5.0V, VSS= 0V, Tc= -55°C to +125°C)
Read Cycle
Parameter
Symbol
–025
Min
Max
–035
Min
Max
Units
Read Cycle Time
tRC
25
35
ns
Address Access Time
tAA
25
35
ns
Chip Select Access Time
tACE
25
35
ns
Output Hold from Address Change
tOH
0
0
ns
Output Enable to Output Valid
tOE
12
25
ns
Chip Select to Output in Low Z *
tCLZ
2
4
ns
Output Enable to Output in Low Z *
tOLZ
0
0
ns
Chip Deselect to Output in High Z *
tCHZ
12
15
ns
Output Disable to Output in High Z *
tOHZ
12
15
ns
* Parameters guaranteed by design but not tested
Write Cycle
Parameter
Symbol
–025
Min
Max
–035
Min
Max
Units
Write Cycle Time
tWC
25
35
ns
Chip Select to End of Write
tCW
17
25
ns
Address Valid to End of Write
tAW
17
25
ns
Data Valid to End of Write
tDW
13
20
ns
Write Pulse Width
tWP
17
25
ns
Address Setup Time
tAS
2
2
ns
Output Active from End of Write *
tOW
4
4
ns
Write to Output in High Z *
tWHZ
13
15
ns
Data Hold from Write Time
tDH
0
0
ns
Address Hold Time
tAH
0
0
ns
* Parameters guaranteed by design but not tested
Truth Table
Mode
SCE
OE
SWE
Data I/O
Power
Standby
H
X
X
High Z
Standby
Read
L
L
H
Data Out
Active
Output Disable
L
H
H
High Z
Active
Write
L
X
L
Data In
Active



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