LTC6409 datasheet(21/32 Pages) LINER

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LTC6417

6417f

applicaTions inForMaTion

Output Common Mode Adjustment

For AC-coupled applications, the output common mode

voltage is set by the VCM pin. An internal buffer, as shown

in Figure 6, couples the voltage on the VCM pin to the

inputs via high impedance resistors. Because the input

common mode voltage is approximately the same as the

output common mode voltage, both are approximately

equal to the voltage applied to the VCMpin.ForDC-coupled

applications, the internal VCM is overdriven by the input

signal. The VCM pin has a Thevenin equivalent resistance

of 2.7k and can be overdriven by an external voltage. The

VCM pin floats to a default voltage of 1.25V on a 5V supply.

The output common mode voltage is capable of tracking

VCM in a range from 0.29V to 2.25V on a 5.0V supply. The

VCM pin can be floated, but it should always be bypassed

close to the LTC6417 with a 0.1µF bypass capacitor to

GND. When interfacing with A/D converters such as the

LTC22xx families, the VCM pin can be connected to the

VCM output pin of the ADC, as shown in Figure 5.

Clamping, the CLHI Pin and the VCM Pin

The CLHI pin is used to set the high side clamp voltage

of the high speed internal circuitry.

This limits the single-ended maximum and minimum

voltage excursion at each of the outputs. This feature is

extremely important in applications with input signals

having very large peak-to-average ratios such as cellular

base station receivers.

Internal circuitry generates a symmetric low side clamp

voltage with respect to the common mode voltage VCM

(Figures 7 and 8). The LTC6417 clamp control circuitry

features two additional mechanisms. First, internally im-

posedmaximumswingof2.5Vandminimumswingof0.2V

ensure that the transistors do not go into deep saturation.

Thisensuresaquickrecoveryaftertheclampsarereleased.

Second, if CLHI voltage is less than VCM, internal CLLO

starts to track CLHI. This limits output swing and protects

output transistors. Since the clamp response is on the

order of 5ns to clamp and 1ns to release, clamp circuit

becomes less effective at frequencies beyond 160MHz.

Figure 6. LTC6417 Internal Topology Showing

the Common Mode Buffer Biasing the Inputs

6417 F06

1.5Ω

10.8k

V+

IN+

OUT+

OUT–

IN–

GND

VCM

3.6k

9.25k

1.5Ω

LTC6417

Figure 7. Internal Circuitry Generating Symmetric

Clamp Voltages with Respect to VCM

Figure 8. Symmetric High- and Low-Side Clamp

Voltages with Respect to VCM

6417 F07

–

V+

CLHI

CLHI (INT)

CLLO (INT)

GND

VCM

9.6k

LTC6417

6417 F08

VCM

CLHI

CLLO

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