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LTC3621 датащи(PDF) 3 Page - Linear Technology |
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LTC3621 датащи(HTML) 3 Page - Linear Technology |
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3 / 16 page ![]() LTC3621/LTC3621-2 3 3621f For more information www.linear.com/LTC3621 elecTrical characTerisTics The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, unless otherwise noted. (Notes 3, 6) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Transient absolute maximum voltages should not be applied for more than 4% of the switching duty cycle. Note 3: The LTC3621 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3621E is guaranteed to meet specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3621I is guaranteed over the –40°C to 125°C operating junction temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. Note 4: The quiescent current in forced continuous mode does not include switching loss of the power FETs. Note 5: The LTC3621 is tested in a proprietary test mode that connects VFB to the output of error amplifier. Note 6: TJ is calculated from the ambient, TA, and power dissipation, PD, according to the following formula: TJ = TA + (PD • θJA) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VFB Regulated Feedback Voltage l 0.594 0.591 0.6 0.6 0.606 0.609 V V IFB FB Input Current 10 nA ΔVLINE(REG) Reference Voltage Line Regulation VIN = 2.7V to 17V (Note 5) 0.01 0.015 %/V ΔVLOAD(REG) Output Voltage Load Regulation (Note 5) 0.1 % ILSW NMOS Switch Leakage PMOS Switch Leakage 0.1 0.1 1 1 µA µA RDS(ON) NMOS On-Resistance PMOS On-Resistance VIN = 5V 0.15 0.37 Ω Ω DMAX Maximum Duty Cycle VFB = 0.5V, VMODE = 1.5V l 100 % tON(MIN) Minimum On-Time VFB = 0.7V, VMODE = 1.5V 60 ns VRUN RUN Input High Threshold RUN Input Low Threshold 0.3 1.0 V V IRUN RUN Input Current VRUN = 12V 0 20 nA VMODE Pulse-Skipping Mode Burst Mode Operation Forced Continuous Mode VINTVCC – 0.4 1.0 0.3 VINTVCC – 1.0 V V V IMODE MODE Input Current VMODE = 3.6V 0 10 nA tSS Internal Soft-Start Time 0.5 ms ILIM Peak Current Limit l 1.44 1.30 1.60 1.76 1.80 A A VUVLO VINTVCC Undervoltage Lockout VIN Ramping Up 2.4 2.6 2.7 V VUVLO(HYS) VINTVCC Undervoltage Lockout Hysteresis 250 mV VOVLO VIN Overvoltage Lockout Rising l 18 19 20 V VOVLO(HYS) VIN Overvoltage Lockout Hysteresis 300 mV fOSC Oscillator Frequency 2.25MHz Parts 1MHz Parts 2.25MHz Parts 1MHz Parts l l 2.05 0.92 1.8 0.82 2.25 1.00 2.45 1.08 2.6 1.16 MHz MHz MHz MHz VINTVCC VINTVCC LDO Output Voltage VIN > 4V 3.3 3.6 3.9 V ΔVPGOOD Power Good Range ±7.5 ±11 % RPGOOD Power Good Resistance PGOOD RDS(ON) at 500µA 275 350 Ω tPGOOD PGOOD Delay PGOOD Low to High PGOOD High to Low 0 32 Cycles Cycles IPGOOD PGOOD Leakage Current 100 nA |
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