ADMC326YN datasheet(17/31 Pages) AD

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ADMC326

–17–

REV. A

CHARGING CAPACITOR – nF

100

150

200

468

Figure 13. PWMSYNCWT Program Value

ADC Resolution

The ADC is intrinsically linked to the PWM block through the

PWMSYNC pulse controlling the ADC conversion process.

Because of this link, the effective resolution of the ADC is a

function of both the PWM switching frequency and the rate at

which the ADC counter timer is clocked. For a CLKOUT period

of tCK and a PWM period of TPWM, the maximum count of the

ADC is given by:

Max Count = min (4095, (TPWM – TCRST)/2 tCK)

for MODECTRL Bit 7 = 0

Max Count = min (4095, (TPWM – TCRST)/tCK)

for MODECTRL Bit 7 = 1

Where TPWM is equal to the PWM period if operating in single

update mode, or it is equal to half that period if operating in

double update mode. For an assumed CLKOUT frequency of

20 MHz and PWMSYNC pulsewidth of 2.0

µs, the effective

resolution of the ADC block is tabulated for various PWM

switching frequencies in Table VII.

Table VII. ADC Resolution Examples

PWM

MODECTRL[7] = 0

MODECTRL[7] = 1

Freq.

Max

Effective

Max

Effective

(kHz)

Count

Resolution

Count

Resolution

2.4

4095

2480

>11

4095

1230

>10

2460

>11

535

1070

>10

380

760

Charging Capacitor Selection

The charging capacitor value is selected based on the sample

(PWM) frequency desired. A selected capacitor value that is

too small will reduce the available resolution of the ADC by

having the ramp voltage rise rapidly and convert too quickly,

not utilizing all possible counts available in the PWM cycle. Too

large a capacitor may not convert in the available PWM cycle,

returning 0xFFF. To select a charging capacitor use Figure 14,

select the sampling frequency desired, then determine if the cur-

rent source is to be tuned to a nominal 100

µA or left in the

default (0x0 code) trim state, then determine the proper charge

capacitor from the appropriate curve.

PWM FREQUENCY – kHz

100

DEFAULT ICONST

TUNED ICONST

Figure 14. Timing Capacitor Selection

Programmable Current Source

The ADMC326 has an internal current source that is used to

charge an external capacitor, generating the voltage ramp used

for conversion. The magnitude of the output of the current source

circuit is subject to manufacturing variations and can vary from

one device to the next. Therefore, the ADMC326 incudes a pro-

grammable current source whose output can always be tuned to

within 5% of the target 100

µA. A 3-bit register, ICONST_TRIM,

allows the user to make this adjustment. The output current is

proportional to the value written to the register: 0x0 produces

the minimum output, and 0x7 produces the maximum output.

The default value of ICONST_TRIM after reset is 0x0.

ADC Reference Ramp Calibration

The peak of the ADC ramp voltage should be as close as pos-

sible to 3.5 V to achieve the optimum ADC resolution and

signal range. When the current source is in the Default State,

the peak of the ADC ramp slope will be lower than this “3.5 V”

target ramp. When the current source value is increased, the

ADC ramp slope will become closer to the target value. The

“tuned” ramp slope is the one closest to the target ramp.

A simple calibration procedure using the internal 2.5 V reference

voltage allows the selection of the ICONST_TRIM register

value to reach this “tuned” ramp slope:

1. A high quality linear ADC capacitor is selected using Figure

14 for a tuned ICONST.

2. Program PWMSYNCWT to proper count as in Figure 13.

3. The ADC Max Count is calculated, as described in the ADC

Resolution section.

4. The target reference conversion count is calculated as TAR-

GET = (Max Count)

× (2.5 V/3.5 V).

5. Reset or software sets the ICONST_TRIM register to zero.

6. Select the calibration VREF in software on ADC multiplexer

and wait one PWM cycle for updated ADC value.

7. The calibration channel value is compared with the target

reference conversion.

8. If this value is greater than the TARGET, the ICONST_TRIM

value is incremented by one, and Step 7 is repeated.

9. If the calibration channel value is less than the TARGET, the

calibration is completed.

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