ADMC328

–29–

REV. B

0

0

0

0

DM (0x2000)

ADC1 (R)

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0

0

0

0

DM (0x2001)

ADC2 (R)

15

14

13

12

11

10

9

8

7654

3210

0

0

0

0

DM (0x2002)

ADC3 (R)

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0

0

0

0

DM (0x2003)

ADCAUX (R)

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

DM (0x2068)

ICONST_TRIM (R/W)

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

ICONST MIN = BITS 0 – 2 CLEARED.

ICONST MAX = BITS 0 – 2 SET.

0

0

0

00

0

0

00

0

0

00

0

0

0

Figure 26. Configuration of Additional AUX Registers

Default bit values are shown; if no value is shown, the bit field is undefined at reset. Reserved bits are shown on a gray field—these

bits should always be written as shown.