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ADF4116BCP датащи(PDF) 15 Page - Analog Devices

номер детали ADF4116BCP
подробное описание детали  RF PLL Frequency Synthesizers
PDF  20 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADF4116BCP датащи(HTML) 15 Page - Analog Devices

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ADF4116/ADF4117/ADF4118
–15–
REV. 0
Table VII. Initialization Latch Map
M3
0
0
0
0
1
1
1
1
M2
0
0
1
1
0
0
1
1
M1
0
1
0
1
0
1
0
1
OUTPUT
THREE-STATE OUTPUT
DIGITAL LOCK DETECT
(ACTIVE HIGH)
N DIVIDER OUTPUT
AVDD
R DIVIDER OUTPUT
ANALOG LOCK DETECT
(N CHANNEL OPEN DRAIN)
SERIAL DATA OUTPUT
(INVERSE POLARITY OF
SERIAL DATA INPUT)
DGND
TC4
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
TC3
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TC2
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TC1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TIMEOUT
(PFD CYCLES)
3
7
11
15
19
23
27
31
35
39
43
47
51
55
59
63
F1
0
1
COUNTER
OPERATION
NORMAL
R, A, B COUNTERS
HELD IN RESET
F2
0
1
PD POLARITY
NEGATIVE
POSITIVE
F3
0
1
CHARGE PUMP
OUTPUT
NORMAL
THREE-STATE
0
1
1
1
CE PIN PD2 PD1
MODE
ASYNCHRONOUS POWER-DOWN
NORMAL OPERATION
ASYNCHRONOUS POWER-DOWN
SYNCHRONOUS POWER-DOWN
X
X
0
1
X
0
1
1
F6
X
0
1
FASTLOCK MODE
FASTLOCK DISABLED
FASTLOCK MODE 1
FASTLOCK MODE 2
F4
0
1
1
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB13
DB12
DB11
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DB10
PD2
TC4
TC3
TC2
TC1
F6
F4
F3
F2
M3
M2
M1
PD1
F1
C2 (1)
C1 (1)
CONTROL
BITS
MUXOUT
CONTROL
TIMER COUNTER
CONTROL
RESERVED
X
X
XX
X



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