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ADDC02808PB датащи(PDF) 12 Page - Analog Devices

номер детали ADDC02808PB
подробное описание детали  28 V, 200 W Pulsed DC/DC Converter with Integral EMI Filter
PDF  20 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADDC02808PB датащи(HTML) 12 Page - Analog Devices

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ADDC02808PB
REV. A
–12–
When Pin 6 is disconnected from input return, the converter
will restart in the soft-start mode. Pin 6 must be kept low for at
least 2 milli- seconds to initiate a full soft start. Shorter off times
will result in a partial soft start. Figure 35 shows the input char-
acteristics of Pin 6.
Pin 7 (SYNC)
Pin 7 can be used for connecting multiple converters to a master
clock. This master clock can be either an externally user-sup-
plied clock or it can be a converter that has been modified and
designated as a master unit. Consult factory for availability of
these devices. Capacitive coupling of the clock signal will insure
that if the master clock stops working the individual units will
continue to operate at their own internal clock frequency,
thereby eliminating a potential single point failure. Capacitive
coupling will also permit a wider duty cycle to be used. Consult
factory for more information. The SYNC pin has an internal
pull-down so it is not necessary to sink any current when driving
the pin low.
For user-supplied master clocks with no external circuitry, the
following specifications must be met:
a. Frequency: 1.00 MHz min
b. Duty cycle: 7% min, 14% max
c. High state voltage high level: 4 V min to 7 V max
d. Low state voltage low level: 0 V min to 3.0 V max
Users should note that the SYNC pin is referenced to the input
return of the converter. If the user-supplied master clock is
generated on the output side of the converter, the signal should
be isolated.
Users should be careful about the frequency selected for the
external master clock. Higher switching frequencies will reduce
efficiency and may reduce the amount of output power available
at minimum input line. Consult factory for modified standard
switching frequency to accommodate system clock characteristics.
Pin 8 (ISHARE)
Pin 8 allows paralleled converters to share the total load cur-
rent, typically within
±5% at full load. To use the current share
feature, connect all current share pins to each other and con-
nect the SENSE pins on each of the converters. The current
sharing function is sensitive to the differential voltage between the
input return pins of paralleled converters. The current sharing
function is also sensitive to noise, and care should be taken in
the routing of connections. Refer to Figure 45 for typical appli-
cation circuits using paralleled converters.
Pin 9 (TEMP)
Pin 9 can be used to indicate case temperature or to raise or
disable the temperature at which thermal shutdown occurs.
Typically, 3.90 V corresponds to +25
°C, with a +13.1 mV/°C
change for every 1
°C rise. The sensor IC (connected from Pin
9 to the input return (Pin 10)) has a 13.1 k
Ω impedance.
The thermal shutdown feature has been set to shut down the
converter when the case temperature is nominally 110
°C to
115
°C. To raise the temperature at which shutdown occurs,
connect a resistor with the value shown in Figure 36 from Pin 9
to the input return (Pin 10). To completely disable the tem-
perature shutdown feature, connect a 50 k
Ω resistor from Pin 9
to the input return (Pin 10).
IOL – mA
1.0
0.8
0.0
1.0
19.0
4.0
7.0
10.0
13.0
16.0
0.6
0.4
0.2
Figure 33. Sink Capability of Status Output
Pin 5 (VAUX)
Pin 5 is referenced to the input return and provides a semi-
regulated 14 V to 16 V dc voltage supply for miscellaneous
system use. The maximum permissible current draw is 5 mA
and the voltage varies with the output load of the converter
shown in Figure 34.
10
CONVERTER OUTPUT CURRENT – A
0.0
2.5
5.0
7.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
16
15
14
13
12
11
Figure 34.
Pin 6 (INHIBIT)
Pin 6 is active low and is referenced to the input return of the
converter. Connecting it to the input return will turn the
converter off. For normal operation, the inhibit pin is inter-
nally pulled up to 12 V. Use of an open collector circuit is
recommended.
VIL – V
1.2
1.1
0.7
0.5
2.0
1.0
1.5
1.0
0.9
0.8
Figure 35. Input Characteristics of Pin 6 When Pulled Low



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