AD9763AST datasheet(16/28 Pages) AD

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REV. B

AD9763

–16–

Worst case PSRR for either one of the differential DAC outputs

will occur when the full-scale current is directed towards that

output. As a result, the PSRR measurement in Figure 38 repre-

sents a worst case condition in which the digital inputs remain

static and the full-scale output current of 20 mA is directed to the

DAC output being measured.

An example serves to illustrate the effect of supply noise on the

analog supply. Suppose a switching regulator with a switching

frequency of 250 kHz produces 10 mV of noise and, for simplic-

ity sake (i.e., ignore harmonics), all of this noise is concentrated

at 250 kHz. To calculate how much of this undesired noise will

appear as current noise superimposed on the DAC’s full-scale

current, IOUTFS, one must determine the PSRR in dB using

Figure 38 at 250 kHz. To calculate the PSRR for a given RLOAD,

such that the units of PSRR are converted from A/V to V/V,

adjust the curve in Figure 38 by the scaling factor 20

× Log

(RLOAD ). For instance, if RLOAD is 50

Ω, the PSRR is reduced

by 34 dB (i.e., PSRR of the DAC at 250 kHz, which is 85 dB in

Figure 38, becomes 51 dB VOUT/VIN).

Proper grounding and decoupling should be a primary objective

in any high speed, high resolution system. The AD9763 features

separate analog and digital supply and ground pins to optimize

the management of analog and digital ground currents in a

system. In general, AVDD, the analog supply, should be de-

coupled to ACOM, the analog common, as close to the chip as

physically possible. Similarly, DVDD, the digital supply, should

be decoupled to DCOM as close to the chip as physically possible.

For those applications that require a single +5 V or +3 V supply

for both the analog and digital supplies, a clean analog supply

may be generated using the circuit shown in Figure 39. The

circuit consists of a differential LC filter with separate power

supply and return lines. Lower noise can be attained by using

low ESR type electrolytic and tantalum capacitors.

100 F

10–22 F

0.1 F

TTL/CMOS

LOGIC

CIRCUITS

+5V

POWER SUPPLY

FERRITE

BEADS

AVDD

ACOM

ELECTROLYTIC

TANTALUM

CERAMIC

Figure 39. Differential LC Filter for Single +5 V and +3 V

Applications

APPLICATIONS

Using the AD9763 for Quadrature Amplitude Modulation

QAM is one of the most widely used digital modulation schemes

in digital communications systems. This modulation technique

can be found in FDM as well as spread spectrum (i.e., CDMA)

based systems. A QAM signal is a carrier frequency that is modu-

lated in both amplitude (i.e., AM modulation) and phase (i.e.,

PM modulation). It can be generated by independently modu-

lating two carriers of identical frequency but with a 90

° phase

difference. This results in an in-phase (I) carrier component

and a quadrature (Q) carrier component at a 90

° phase shift

with respect to the I component. The I and Q components are

then summed to provide a QAM signal at the specified carrier

frequency.

A common and traditional implementation of a QAM modula-

tor is shown in Figure 40. The modulation is performed in the

analog domain in which two DACs are used to generate the

baseband I and Q components. Each component is then typi-

cally applied to a Nyquist filter before being applied to a

quadrature mixer. The matching Nyquist filters shape and limit

each component’s spectral envelope while minimizing intersym-

bol interference. The DAC is typically updated at the QAM

symbol rate or possibly a multiple of it if an interpolating filter

precedes the DAC. The use of an interpolating filter typically

eases the implementation and complexity of the analog filter,

which can be a significant contributor to mismatches in gain and

phase between the two baseband channels. A quadrature mixer

modulates the I and Q components with the in-phase and

quadrature carrier frequency and then sums the two outputs to

provide the QAM signal.

DAC

CARRIER

FREQUENCY

MIXER

NYQUIST

FILTERS

QUADRATURE

MODULATOR

DAC

DSP

ASIC

Figure 40. Typical Analog QAM Architecture

In this implementation, it is much more difficult to maintain

proper gain and phase matching between the I and Q channels.

The circuit implementation shown in Figure 41 helps improve

upon the matching between the I and Q channels, as well as

showing a path for upconversion using the AD8346 quadrature

modulator. The AD9763 provides both I and Q DACs as well

as a common reference that will improve the gain matching and

stability. RCAL can be used to compensate for any mismatch in

gain between the two channels. The mismatch may be attrib-

uted to the mismatch between RSET1 and RSET2, effective load

resistance of each channel, and/or the voltage offset of the con-

trol amplifier in each DAC. The differential voltage outputs of

both DACs in the AD9763 are fed into the respective differen-

tial inputs of the AD8346 via matching networks.

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