AD976/AD976A

–14–

REV. C

8051 Interface

Figure 21 illustrates the use of the AD976/AD976A with an

8051 microcontroller.

DB7

DB0

BYTE

A0

CS

BUS

*ADDITIONAL PINS OMITTED FOR CLARITY

BUSY

AD976/

AD976A

8051

LATCH

BUS

BUS

AD0

AD7

P0

A15

A8

P2

RD

WR

INT

R/

C

ADDR

DECODE

Figure 21. AD976/AD976A to 8051 Interface

TMS320C25 Interface

Figure 22 shows an interface between the AD976/AD976A and

the TMS320C25.

TIMER

ADDRESS BUS

*ADDITIONAL PINS OMITTED FOR CLARITY

DATA BUS

DB15

DB0

BUSY

AD976/

AD976A

R/

C

EN

ADDR

DECODE

A0

A15

D15

D0

TMS320C25

R/W

IS

READY

STRB

NSC

INT

CS

Figure 22. AD976/AD976A to TMS320C25 Interface

ADSP-2111 Interface

Figure 23 shows an interface to the ADSP-2111 signal processor.

In this example, CS is being used to control conversions and is

generated by an external timer. A conversion is initiated each

time the timer output goes low as long as you are not reading

from the AD976/AD976A and while the Flag Output (FO) pin

of the ADSP-2111 is low. When a conversion is complete, the

BUSY line will return high. With the IRQn pin programmed to

generate an interrupt on a high-to-low transition, an interrupt

will occur at the end of each conversion. The 16-bit result of the

conversion can be read from within the interrupt service routine

by first forcing FO high, then performing a read operation with

the AD976/AD976A.

ADDRESS BUS

*ADDITIONAL PINS OMITTED FOR CLARITY

DATA BUS

DB15

DB0

BUSY

AD976/

AD976A

EN

ADDR

DECODE

A0

A13

D15

D0

ADSP-2111

DMS

IRQn

CS

TIMER

RD

FO

R/

C

Figure 23. AD976/AD976A to ADSP-2111 Interface

POWER SUPPLIES AND DECOUPLING

digital circuitry. The AD976/AD976A is designed to be inde-

pendent of power supply sequencing and, thus, free from supply

voltage induced latch-up.

With high performance linear circuits, changes in the power

supplies can result in undesired circuit performance. Optimally,

well regulated power supplies should be chosen with less than

1% ripple. The ac output impedance of a power supply is a

complex function of frequency and it will generally increase with

frequency. Thus, high frequency switching, such as that encoun-

tered with digital circuitry, requires the fast transient currents

that most power supplies can not adequately provide. Such a

situation results in large voltage spikes on the supplies. To com-

pensate for the finite ac output impedance of most supplies,

charge “reserves” should be stored in bypass capacitors. This

will effectively lower the supplies impedance presented to the

of these spikes. Decoupling capacitors, typically 0.1

µF, should

be placed close to the power supply pins of the AD976/AD976A

to minimize any inductance between the capacitors and the

The AD976/AD976A may be operated from a single +5 V sup-

ply. When separate supplies are used, however, it is beneficial to

have larger capacitors, 10

µF, placed between the logic supply

10

µF capacitors should be located in the vicinity of the ADC to

further reduce low frequency ripple. In systems where the device

will be subjected to harsh environmental noise, additional de-

coupling may be required.