–2–

REV. 0

, CLOCK = 20 MHz unless otherwise noted)

AD9561JR

Parameter

Temp

Min

Typ

Max

Units

RESOLUTION

8

Bits

ACCURACY (@ 20 MHz)

Differential Nonlinearity

+25

°C

±0.5

±2

LSB

Integral Linearity

1

+25

°C

±1.5

±4

LSB

Odd/Even Pulse Mismatch

2

+25

°C

±0.75

LSB

DIGITAL INPUTS

Logic “1” Voltage

Full

2.0

V

Logic “0” Voltage

Full

0.8

V

Input Current

Full

±1

µA

Input Capacitance

+25

°C

5pF

Data Setup Time

Full

2.0

0.3

ns

Data Hold Time

Full

2.0

0.3

ns

Minimum Clock Pulse Width (HIGH)

Full

6

ns

DYNAMIC PERFORMANCE

Maximum Trigger Rate

Full

60

MHz

3

+25

°C

122028ns

Minimum Propagation Delay TC

Full

60

ps/

°C

Full

5

ns

Output Pulse Width @ Code 255

Full

100

% Clock

Output Rise Time

5, 6

Full

1.8

3

ns

Full

1.8

3

ns

RETRACE Propagation Delay

Full

6

ns

PWM OUTPUT

Logic “1” Voltage

5, 6

Full

4.6

V

Logic “0” Voltage

5, 6

Full

0.4

V

CAL OUT

Logic “1” Voltage

Full

4.6

V

Logic “0” Voltage

Full

0.4

V

Positive Supply Current (+5.0 V)

Full

140

170

mA

Power Dissipation

Full

700

850

mW

Power Reduce Current

Full

70

85

mA

Power Reduce Dissipation

Full

350

425

mW

Power Supply Rejection Ratio

+25

°C

1.5

ns/V

NOTES

± 5%.

Specification subject to change without notice.