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AD9430/PCB-CMOS датащи(PDF) 11 Page - Analog Devices

номер детали AD9430/PCB-CMOS
подробное описание детали  12-Bit, 170 MSPS 3.3V A/D Converter
PDF  20 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9430/PCB-CMOS датащи(HTML) 11 Page - Analog Devices

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PRELIMINARY TECHNICAL DATA
AD9430
REV. PrG 4/01/2002
-11-
Signal -to-Noise Ratio (without Harmonics)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral
components, excluding the first five harmonics and dc.
Spurious-Free Dynamic Range (SFDR)
The ratio of the rms signal amplitude to the rms value of the
peak spurious spectral component. The peak spurious
component may or may not be a harmonic. May be reported
in dBc (i.e., degrades as signal level is lowered), or dBFS
(always related back to converter full scale).
Two-Tone Intermodulation Distortion Rejection
The ratio of the rms value of either input tone to the rms
value of the worst third order intermodulation product;
reported in dBc.
Two-Tone SFDR
The ratio of the rms value of either input tone to the rms
value of the peak spurious component. The peak spurious
component may or may not be an IMD product. May be
reported in dBc (i.e., degrades as signal level is lowered), or
in dBFS (always related back to converter full scale).
Worst Other Spur
The ratio of the rms signal amplitude to the rms value of the
worst spurious component (excluding the second and third
harmonic) reported in dBc.
Transient Response Time
Transient response is defined as the time it takes for the
ADC to reacquire the analog input after a transient from
10% above negative full scale to 10% below positive full
scale.
Out-of-Range Recovery Time
Out of range recovery time is the time it takes for the ADC
to reacquire the analog input after a transient from 10%
above positive full scale to 10% above negative full scale, or
from 10% below negative full scale to 10% below positive
full scale.
EQUIVALENT CIRCUITS
Figure X Encode and DS Inputs
Figure X Analog Inputs
Figure X S1-S5 Inputs
Figure X VREF, SENSE I/O
Figure X Data Outputs (CMOS Mode)
Figure X Data Outputs (LVDS Mode)



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