AD9243EB datasheet(14/24 Pages) AD

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AD9243

REV. A

–14–

If the application requires the largest single-ended input range

(i.e., 0 V to 5 V) of the AD9243, the op amp will require larger

supplies to drive it. Various high speed amplifiers in the “Op

Amp Selection Guide” of this data sheet can be selected to

accommodate a wide range of supply options. Once again,

clamping the output of the amplifier should be considered for

these applications. Alternatively, a single-ended to differential

op amp driver circuit using the AD8042 could be used to

achieve the 5 V input span while operating from a single +5 V

supply.

Two dc coupled op amp circuits using a noninverting and inverting

topology are discussed below. Although not shown, the nonin-

verting and inverting topologies can be easily configured as part

of an antialiasing filter by using a Sallen-Key or Multiple-Feed-

back topology, respectively. An additional R-C network can be

inserted between the op amp’s output and the AD9243 input to

provide a real pole.

Simple Op Amp Buffer

In the simplest case, the input signal to the AD9243 will already

be biased at levels in accordance with the selected input range.

It is simply necessary to provide an adequately low source im-

pedance for the VINA and VINB analog input pins of the A/D.

Figure 32 shows the recommended configuration for a single-

ended drive using an op amp. In this case, the op amp is shown

in a noninverting unity gain configuration driving the VINA pin.

The internal reference drives the VINB pin. Note that the

addition of a small series resistor of 30

Ω to 50 Ω connected to

VINA and VINB will be beneficial in nearly all cases. Refer to

section “Analog Input Operation” for a discussion on resistor

selection. Figure 32 shows the proper connection for a 0 V to 5 V

input range. Alternative single ended input ranges of 0 V to 2

VREF can also be realized with the proper configuration of VREF

(refer to the section “Using the Internal Reference”).

10 F

VINA

VINB

SENSE

AD9243

0.1 F

–V

VREF

2.5V

Figure 32. Single-Ended AD9243 Op Amp Drive Circuit

Op Amp with DC Level Shifting

Figure 33 shows a dc-coupled level shifting circuit employing an

op amp, A1, to sum the input signal with the desired dc offset.

Configuring the op amp in the inverting mode with the given

resistor values results in an ac signal gain of –1. If the signal

inversion is undesirable, interchange the VINA and VINB con-

nections to reestablish the original signal polarity. The dc volt-

age at VREF sets the common-mode voltage of the AD9243. For

example, when VREF = 2.5 V, the output level from the op amp

will also be centered around 2.5 V. The use of ratio matched,

thin-film resistor networks will minimize gain and offset errors.

Also, an optional pull-up resistor, RP, may be used to reduce the

output load on VREF to

±1 mA.

0VDC

+VREF

–VREF

VINA

VINB

AD9243

0.1 F

500 *

0.1 F

500 *

+VCC

500 *

VREF

500 *

AVDD

RP**

*OPTIONAL RESISTOR NETWORK-OHMTEK ORNA500D

**OPTIONAL PULL-UP RESISTOR WHEN USING INTERNAL REFERENCE

NC = NO CONNECT

Figure 33. Single-Ended Input With DC-Coupled Level Shift

AC COUPLING AND INTERFACE ISSUES

For applications where ac coupling is appropriate, the op amp’s

output can be easily level shifted to the common-mode voltage,

VCM, of the AD9243 via a coupling capacitor. This has the

advantage of allowing the op amps common-mode level to be

symmetrically biased to its midsupply level (i.e., (VCC + VEE)/2).

Op amps which operate symmetrically with respect to their

power supplies typically provide the best ac performance as well

as greatest input/output span. Hence, various high speed/perfor-

mance amplifiers which are restricted to +5 V/–5 V operation

and/or specified for +5 V single-supply operation can be easily

configured for the 5 V or 2 V input span of the AD9243, respec-

tively. The best ac distortion performance is achieved when the

A/D is configured for a 2 V input span and common-mode

voltage of 2.5 V. Note that differential transformer coupling,

which is another form of ac coupling, should be considered for

optimum ac performance.

Simple AC Interface

Figure 34 shows a typical example of an ac-coupled, single-

ended configuration. The bias voltage shifts the bipolar, ground-

referenced input signal to approximately VREF. The value for

C1 and C2 will depend on the size of the resistor, R. The ca-

pacitors, C1 and C2, are typically a 0.1

µF ceramic and 10 µF

tantalum capacitor in parallel to achieve a low cutoff frequency

while maintaining a low impedance over a wide frequency range.

The combination of the capacitor and the resistor form a high-

pass filter with a high-pass –3 dB frequency determined by the

equation,

f–3 dB = 1/(2

× π × R × (C1 + C2))

The low impedance VREF voltage source biases both the VINB

input and provides the bias voltage for the VINA input. Figure

34 shows the VREF configured for 2.5 V. Thus the input range

VINA

VINB

SENSE

AD9243

+5V

–5V

VREF

+VREF

–VREF

VIN

Figure 34. AC-Coupled Input

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