AD9240AS datasheet(17/24 Pages) AD

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AD9240

REV. A

–17–

the resultant VREF output is 2.5 V. The valid input range thus

becomes 0 V to 5 V. The VREF pin should be bypassed to the

REFCOM pin with a 10

µF tantalum capacitor in parallel with a

low-inductance 0.1

µF ceramic capacitor.

Single-Ended or Differential Input, VCM = 2.5 V

Figure 37 shows the single-ended configuration that gives the

best SINAD performance. To optimize dynamic specifications,

center the common-mode voltage of the analog input at

approximately by 2.5 V by connecting VINB to VREF, a low-

impedance 2.5 V source. As described above, shorting the

SENSE pin directly to the REFCOM pin results in a 2.5 V

reference voltage and a 5 V p-p input span. The valid range

for input signals is 0 V to 5 V. The VREF pin should be by-

passed to the REFCOM pin with a 10

µF tantalum capacitor in

parallel with a low inductance 0.1

µF ceramic capacitor.

This reference configuration could also be used for a differential

input in which VINA and VINB are driven via a transformer as

shown in Figure 32. In this case, the common-mode voltage,

VCM, is set at midsupply by connecting the transformer’s center

tap to CML of the AD9240. VREF can be configured for 1 V

or 2.5 V by connecting SENSE to either VREF or REFCOM

respectively. Note that the valid input range for each of the

differential inputs is one half of the single-ended input and thus

becomes VCM – VREF/2 to VCM + VREF/2.

0.1 F

10 F

VINA

VINB

VREF

SENSE

REFCOM

AD9240

2.5V

Figure 40. Internal Reference—5 V p-p Input Span,

VCM = 2.5 V

Resistor Programmable Reference

Figure 41 shows an example of how to generate a reference

voltage other than 1 V or 2.5 V with the addition of two external

resistors and a bypass capacitor. Use the equation,

VREF = 1 V

× (1 + R1/R2),

to determine appropriate values for R1 and R2. These resistors

should be in the 2 k

Ω to 100 kΩ range. For the example

shown, R1 equals 2.5 k

Ω and R2 equals 5 kΩ. From the equa-

tion above, the resultant reference voltage on the VREF pin is

1.5 V. This sets the input span to be 3 V p-p. To assure stabil-

ity, place a 0.1

µF ceramic capacitor in parallel with R1.

The common-mode voltage can be set to VREF by connecting

VINB to VREF to provide an input span of 0 to 2

× VREF.

Alternatively, the common-mode voltage can be set to 2.5 V

by connecting VINB to a low impedance 2.5 V source. For

the example shown, the valid input signal range for VINA is 1 V

to 4 V since VINB is set to an external, low impedance 2.5 V

source. The VREF pin should be bypassed to the REFCOM pin

with a 10

µF tantalum capacitor in parallel with a low induc-

tance 0.1

µF ceramic capacitor.

1.5V

0.1 F

10 F

VINA

VINB

VREF

SENSE

REFCOM

AD9240

2.5V

2.5k

0.1 F

Figure 41. Resistor Programmable Reference (3 V p-p

Input Span, VCM = 2.5 V)

USING AN EXTERNAL REFERENCE

Using an external reference may enhance the dc performance of

the AD9240 by improving drift and accuracy. Figures 42

through 44 show examples of how to use an external reference

with the A/D. Table III is a list of suitable voltage references

from Analog Devices. To use an external reference, the user

must disable the internal reference amplifier and drive the

VREF pin. Connecting the SENSE pin to AVDD disables the

internal reference amplifier.

Table III. Suitable Voltage References

Initial

Operating

Output

Drift

Accuracy

Current

Voltage

(ppm/ C)

% (max)

( A)

Internal

1.00

1.4

N/A

REF191

2.048

5–25

0.1–0.5

Internal

2.50

1.4

N/A

REF192

2.50

5–25

0.08–0.4

AD780

2.50

3–7

0.04–0.2

1000

The AD9240 contains an internal reference buffer, A2 (see

Figure 29), that simplifies the drive requirements of an external

reference. The external reference must be able to drive a

≈5 kΩ

(

±20%) load. Note that the bandwidth of the reference buffer is

deliberately left small to minimize the reference noise contribu-

tion. As a result, it is not possible to change the reference volt-

age rapidly in this mode without the removal of the CAPT/

CAPB Decoupling Network, and driving these pins directly.

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