AD8302 datasheet(18/24 Pages) AD

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REV. 0

AD8302

–18–

Cross-modulation of Magnitude and Phase

At high frequencies, unintentional cross coupling between signals

in channels A and B inevitably occurs due to on-chip and board-

level parasitics. When the two signals presented to the AD8302

inputs are at very different levels, the cross-coupling introduces

cross-modulation of the phase and magnitude responses. If the two

signals are held at the same relative levels and the phase between

them is modulated, then only the phase output should respond.

Due to phase-to-amplitude cross modulation, the magnitude out-

put shows a residual response. A similar effect occurs when the

relative phase is held constant while the magnitude difference is

modulated; i.e an expected magnitude response and a residual

phase response are observed due to amplitude-to-phase cross

modulation. The point where these effects are noticeable depends

on the signal frequency and the magnitude of the difference. Typi-

cally, for differences <20 dB, the effects of cross modulation are

negligible at 900 MHz.

Modifying the Slope and Center-Point

The default slope and center-point values can be modified with

the addition of external resistors. Since the output interface

blocks are generalized for both magnitude and phase functions,

the scaling modification techniques are equally valid for both

outputs. Figure 8 demonstrates how a simple voltage divider

from the VMAG and VPHS pins to the MSET and PSET pins

can be used to modify the slope. The increase in slope is given

by 1 + R1/(R2 20 k

Ω). Note that it may be necessary to account

for the MSET and PSET input impedance of 20 k

Ω which has a

±20% manufacturing tolerance. As is generally true in such feed-

back systems, envelope bandwidth is decreased and the output

noise transferred from the input is increased by the same factor.

For example, by selecting R1 and R2 to be 10 k

Ω and 20 kΩ,

respectively, gain slope increases from the nominal 30 mV/dB by

a factor of 2 to 60 mV/dB. The range is reduced by a factor of

two and the new center-point is at –15 dB; i.e. the range now

extends from –30 dB, corresponding to VMAG = 0 V, to 0 dB,

corresponding to VMAG = 1.8 V.

NEW SLOPE = 30mV/dB

||R20k

VMAG

MSET

20k

Figure 8. Increasing the Slope Requires the Inclusion of a

Voltage Divider

Repositioning the center-point back to its original value of 0 dB

simply requires that an appropriate voltage be applied to the

grounded side of the lower resistor in the voltage divider. This

voltage may be provided externally or derived from the inter-

nal reference voltage on pin VREF. For the specific choice of

R2 = 20 k

Ω, the center-point is easily readjusted to 0 dB by con-

necting the VREF pin directly to the lower pin of R2 as shown in

Figure 9. The increase in slope is now simplified to 1 + R1/10 k

Ω.

Since this 1.80 V reference voltage is derived from the same

bandgap reference that determines the nominal center-point,

their tracking with temperature, supply and part-to-part varia-

tions should be better in comparison to a fixed external voltage.

If the center-point is shifted to 0 dB in the previous example

where the slope was doubled, then the range spans from –15 dB

at VMAG = 0 V to 15 dB at VMAG = 1.8 V.

10k

NEW SLOPE = 30mV/dB

VMAG

MSET

20k

VREF

Figure 9. The Center-Point is Repositioned with the Help

of the Internal Reference Voltage of 1.80 V

Comparator and Controller Modes

The AD8302 can also operate in a comparator mode if used in

the arrangement shown in Figure 10 where the DUT is the ele-

ment to be evaluated. The VMAG and VPHS pins are no longer

connected to MSET and PSET. The trip-point thresholds for

the gain and phase difference comparison are determined by the

voltages applied to pins MSET and PSET according to,

VMSET (V ) = 30 mV/dB

× GainSP (dB) + 900 mV

(11)

VPSET (V )= –10 mV/

° × (|PhaseSP (°)|–90°) + 900 mV

(12)

where Gain

SP (dB) and PhaseSP (

°) are the desired gain and

phase thresholds. If the actual gain and phase between the two

input channels differ from these thresholds, the VMAG and VPHS

outputs toggle like comparators; i.e.,

1.8 V if Gain > Gain

VMAG =

(13)

0 V if Gain < Gain

1.8 V if Phase > Phase

VPHS =

(14)

0 V if Phase < Phase

VMAG

VMSET

VPSET

VPHS

COMM

MFLT 14

INPA

VMAG

213

OFSA

MSET

312

VPOS

VREF

411

OFSB

PSET

510

INPB

VPHS

COMM

PFLT

AD8302

VINA

VINB

Figure 10. Disconnecting the Feedback to the Setpoint

Controls, the AD8302 Operates in Comparator Mode

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