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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD8037AR датащи(PDF) 21 Page - Analog Devices |
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AD8037AR датащи(HTML) 21 Page - Analog Devices |
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21 / 23 page  AD8036/AD8037 REV. A –21– Layout Considerations The specified high speed performance of the AD8036 and AD8037 requires careful attention to board layout and compo- nent selection. Proper RF design techniques and low pass para- sitic component selection are mandatory. The PCB should have a ground plane covering all unused por- tions of the component side of the board to provide a low im- pedance path. The ground plane should be removed from the area near the input pins to reduce stray capacitance. Chip capacitors should be used for supply and input clamp by- passing (see Figure 83). One end should be connected to the ground plane and the other within 1/8 inch of each power and clamp pin. An additional large (0.47 µF–10 µF) tantalum elec- trolytic capacitor should be connected in parallel, though not necessarily so close, to supply current for fast, large signal changes at the output. The feedback resistor should be located close to the inverting input pin in order to keep the stray capacitance at this node to a minimum. Capacitance variations of less than 1 pF at the in- verting input will significantly affect high speed performance. Stripline design techniques should be used for long signal traces (greater than about 1 inch). These should be designed with a characteristic impedance of 50 Ω or 75 Ω and be properly termi- nated at each end. Evaluation Board An evaluation board for both the AD8036 and AD8037 is avail- able that has been carefully laid out and tested to demonstrate that the specified high speed performance of the device can be realized. For ordering information, please refer to the Ordering Guide. The layout of the evaluation board can be used as shown or serve as a guide for a board layout. IN RO 1k VOUT 0.1 F AD8036/ AD8037 VH 0.1 F VL RS –VS +VS –VS +VS RG RF 1k –VS +VS RT NONINVERTING CONFIGURATION C5 10 F +VS –VS C3 0.1 F C1 0.01 F C6 10 F C4 0.1 F C2 0.01 F OPTIONAL SUPPLY BYPASSING Figure 83. Noninverting Configurations for Evaluation Boards Table I. AD8036A AD8037A Gain Gain Component +1 +2 +10 +100 +2 +10 +100 RF 140 Ω 274 Ω 2 k Ω 2 k Ω 274 Ω 2 k Ω 2 k Ω RG 274 Ω 221 Ω 20.5 Ω 274 Ω 221 Ω 20.5 Ω RO (Nominal) 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω RS 130 Ω 100 Ω 100 Ω 100 Ω 100 Ω 100 Ω 100 Ω RT (Nominal) 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω 49.9 Ω Small Signal BW (MHz) 240 90 10 1.3 275 21 3 |
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