AD7869

–12–

REV. A

AD7869–TMS32020 Interface

Figure 18 shows an interface that is suitable for the TMS32020/

TMS320C25 processors. This interface is configured for syn-

chronous, continuous clock operation. Note the AD7869 will

not correctly interface to these processors if the AD7869 is con-

figured for a noncontinuous clock. Conversion starts and DAC

updating are controlled by an external timer.

TMS32020/

TMS320C25

FSX

DX

TCLK

DT

TFS

*ADDITIONAL PINS OMITTED FOR CLARITY

LDAC

FSR

CLKR

DR

RCLK

DR

CONVST

RFS

CONTROL

TIMER

AD7869*

4.7k

Ω

2k

Ω

4.7k

Ω

5V

+

5V

–

CLKX

Figure 18. AD7869–TMS32020/TMS32025 Interface

APPLICATION HINTS

Good printed circuit board (PCB) layout is as important as the

circuit design itself in achieving high speed A/D performance.

The AD7869’s comparator is required to make bit decisions on

an LSB size of 366

µV. To achieve this, the designer has to be

conscious of noise both in the ADC itself and in the preceding

analog circuitry. Switching mode power supplies are not recom-

mended as the switching spikes will feed through to the com-

parator causing noisy code transitions. Other causes of concern

are ground loops and digital feedthrough from microprocessors.

These are factors that influence any ADC, and a proper PCB

layout that minimizes these effects is essential for best

performance.

LAYOUT HINTS

Ensure that the layout for the printed circuit board has the digi-

tal and analog signal lines separated as much as possible. Take

care not to run any digital track alongside an analog signal track.

Guard (screen) the analog input with AGND.

Establish a single point analog ground (star ground), separate

from the logic system ground, as close as possible to the

AD7869 AGND pins. Connect all other grounds and the

AD7869 DGND to this single analog ground point. Do not

connect any other digital grounds to this analog ground point.

Low impedance analog and digital power supply common re-

turns are essential to low noise operation of the ADC, so make

the foil width for these tracks as wide as possible. The use of

ground planes minimizes impedance paths and also guards the

analog circuitry from digital noise. The circuit layout of Figures

22 and 23 have both analog and digital ground planes that are

kept separated and only joined together at the AD7869 AGND

pins.

NOISE

AGND as short as possible to minimize input noise coupling. In

applications where this is not possible, use a shielded cable be-

tween the source and the ADC. Reduce the ground circuit im-

pedance as much as possible since any potential difference in

grounds between the signal source and the ADC appears as an

error voltage in series with the input signal.

INPUT/OUTPUT BOARD

Figure 19 shows an analog I/O board based on the AD7869.

The corresponding printed circuit (PC) board layout and

silkscreen are shown in Figures 21 to 23.

The analog input to the AD7869 is buffered with an AD711 op

amp. There is a component grid provided near the analog input

on the PC board that may be used for an antialiasing filter for

the ADC or a reconstruction filter for the DAC or any other

conditioning circuitry. To facilitate this option, there are two

wire links (labeled LK1 and LK2) required on the analog input

and output tracks.

The board contains a SHA circuit that can be used on the out-

put of the AD7869 DAC to extend the very good performance

of the part over a wider frequency range. The increased perfor-

mance from the SHA can be seen from Figures 14 and 15 of

this data sheet. A wire link (labeled LK3) connects the board

output to either the SHA output or directly to the AD7869

DAC output .

There are three LDAC link options on the board; LDAC can be

driven from an external source independent of

CONVST,

LDAC can be tied to CONVST or LDAC can be tied to GND.

Choosing the latter option disables the SHA operation and

places the SHA permanently in the track mode.

Microprocessor connections to the board are made by a 9-way

D-type connector. The pinout is shown in Figure 20. The

ADC’s digital outputs are buffered with 74HC4050s. These

buffers provide a higher current output capability for high

capacitance loads or cables. Normally, these buffers are not re-

quired as the AD7869 will be sitting on the same board as the

processor.

POWER SUPPLY CONNECTIONS

The PC board requires two analog power supplies and one 5 V

digital supply. Connections to the analog supply are made di-

rectly to the PC board as shown on the silkscreen in Figure 21.

The connections are labeled V+ and V–, and the range for both

of these supplies is 12 V to 15 V. Connections to the 5 V digital

supply are made through the D-type connector SKT6. The

±5 V analog supply required by the AD7869 is generated from

two voltage regulators on the V+ and V– supplies.

WIRE LINK OPTIONS

LK1, Analog Input Link

LK1 connects the analog input to a component grid or to a

buffer amplifier which drives the ADC input.

LK2, Analog Output Link

LK2 connects the analog output to the component grid or to ei-

ther the SHA or DAC output (see LK3).

LK3, SHA or DAC Select

The analog output may be taken directly from the DAC or from

a SHA at the output of the DAC.

LK4, DAC Reference Selection

The DAC reference may be connected to either the ADC refer-

ence output (RO ADC) or to the DAC reference (RO DAC).