AD7804 datasheet(24/28 Pages) AD

24 / 28 page

AD7804/AD7805/AD7808/AD7809

REV. A

–24–

APPLICATIONS

Opto-Isolated Interface for Process Control Applications

The AD7804/AD7808 has a versatile serial three-wire serial

interface making it ideal for generating accurate voltages in

process control and industrial applications. Due to noise, safety

requirements, or distance, it may be necessary to isolate the

AD7804/AD7808 from the controller. This can easily be

achieved by using opto-isolators which will provide isolation in

excess of 3 kV. The serial loading structure of the AD7804/

AD7808 makes it ideally suited for use in opto-isolated appli-

cations. Figure 41 shows an opto-isolated interface to the

AD7804/AD7808 where SDIN, CLKIN and

FSIN are driven

from optocouplers.

LDAC is hardwired low to reduce the number

of interface lines and this ensures that each DAC is updated follow-

ing the sixteenth serial clock of a write cycle.

AD7804/

AD7808

AVDD

VDD1

VOUTA

VOUTB

VOUTC

VOUTD

AGND

DGND

LDAC

CLR

CLKIN

DVDD

REFIN

0.1 F

10 F

REFOUT

+5V

REGULATOR

CLKIN

VDD

10k

FSIN

SDIN

DATA

POWER

1 TO 10nF

VDD

10k

VDD

10k

Figure 41. AD7804/AD7808 Opto-Isolated Interface

Decoding Multiple AD7808s

The

FSIN pin on the AD7808s can be used in applications to

decode a number of DACs. In this application all DACs in the

system receive the same serial clock and serial data, but only the

FSIN to one of the DACs will be active at any one time allowing

access to eight channels in this thirty-two channel system. The

74HC139 is used as a 2- to 4-line decoder to address any of the

DACs in the system. To prevent timing errors from occurring

the enable input should be brought to its inactive state while the

coded address inputs are changing state. Figure 42 shows a

system decoding multiple AD7808s in a multichannel system.

ENABLE

74HC139

AD7808

FSIN

SDIN

CLKIN

AD7808

FSIN

SDIN

CLKIN

AD7808

FSIN

SDIN

CLKIN

LDAC

SDIN

CLKIN

DGND

CODED

ADDRESS

1Y0

1Y1

1Y2

1Y3

VCC

VDD

AD7808

FSIN

SDIN

CLKIN

LDAC

Figure 42. Decoding Multiple AD7808s Using the

FSIN Pin

AD7805 As a Digitally Programmable Window Detector

A digitally programmable upper/lower limit detector using two

DACs in the AD7805 is shown in Figure 43. The upper and

lower limits for the test are loaded to DACs A and B that in

turn set the limits on the CMP04. If a signal at the VIN input is

not within the programmed window an LED will indicate the

fail condition. Only one limit detector is shown below but can

easily be adapted for a dual channel system by using the extra

DACs on the AD7805 and the two unused comparators on the

CMP04.

+5V

0.01 F

AD7805

AVDD

DVDD

VOUTA

VOUTB

VOUTC

VOUTD

AGND

DGND

LDAC

CLR

COMP

MODE

DVDD

0.1 F

10 F

0.01 F

PASS/

FAIL

PASS

1/2

CMP04

1/6

74HC05

VIN

Figure 43. Digitally Programmable Window Detector

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