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AD7721 датащи(PDF) 14 Page - Analog Devices |
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AD7721 датащи(HTML) 14 Page - Analog Devices |
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14 / 16 page ![]() AD7721 REV. A –14– Parallel Interface In parallel mode, the DRDY signal is still available. This signal can be used to generate an interrupt in the DSP as DRDY goes high for two clock cycles when a conversion is complete. Data is available from the AD7721 every 32 CLK cycles. The ADC outputs the 12-bit digital word automatically. Hence, latches are needed into which the 12-bit parallel word can be transferred. Because RD and CS are permanently tied to DGND when the ADC is performing A-to-D conversions, some further glue logic is needed to interface the AD7721 to a DSP in parallel mode. When a digital word is available from the AD7721, it will be automatically transferred to the latches. The DRDY signal informs the DSP that a new word is available to be read. The DSP then reads the word from the latches. By using the latches, the microprocessor is free to perform other tasks be- tween reads from the AD7721. When using the parallel mode, CS and RD should be permanently tied to DGND, RD being taken high only when a control word is being written to the AD7721. CS and RD should not be pulsed, as is the procedure with other ADCs, as the specifications for the device will degrade and the part may become unstable. CS DSP RD WR INTERRUPT AD7721 DRDY WR RD CS 1Y1 1Y2 1Y3 2Y1 2Y2 2Y3 2Y4 HC244 1G 2G 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1Y4 DECODE DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1Y1 1Y3 2A1 2A2 2A3 2A4 HC244 1G 2G 1A1 1A2 1A3 1A4 2Y1 2Y2 2Y3 2Y4 1Y4 1Y2 Figure 16. Interfacing the AD7721 to a Microprocessor in Parallel Mode AD7721 to ADSP-21xx Interface Figure 17 shows the AD7721 to ADSP-21xx interface. DRDY is used to interrupt the DSP when a conversion is complete and the HC244 latches contain a new word. The WR signal from the DSP is used to drive both the RD and WR inputs of the AD7721 since RD will be tied low at all times except when the control register of the device is being written to. The RD signal of the DSP is used to enable the outputs of the latches so that the 12 bit word can be read into the DSP. Two 8-bit latches are used. Twelve of the latches are used to hold the 12-bit conversion from the AD7721. The remaining four latches are used to hold the control information being transferred from the DSP to the AD7721. When a control word is being written to the AD7721, Bits 4 to 6 and Bits 9 to 10, which are test bits, need to be loaded with zeros. Therefore, pull-down resistors are used so that Pins 4 to 6 and 9 to 10 are tied to ground when the control register is being loaded. CS AD7721 DRDY WR RD CS 1Y1 1Y2 1Y3 2Y1 2Y2 2Y3 2Y4 HC244 1G 2G 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1Y4 1Y1 1Y2 1Y3 2A1 2A2 2A3 2A4 HC244 1G 2G 1A1 1A2 1A3 1A4 2Y1 2Y2 2Y3 2Y4 1Y4 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 RD WR ADSP-21xx DMD11–DMD DMA13–DMA0 IRQ DMS EN ADDR DECODE Figure 17. AD7721 to ADSP-21xx Interface AD7721 to DSP56002 Interface Figure 18 shows the AD7721 to DSP56002 interface. The connections for the DSP56002 are similar to those for the ADSP-21xx family. The diagram shows the connections for the DSP56002, but the connections for the DSP56000 and DSP56001 are similar. CS AD7721 DRDY WR RD CS 1Y1 1Y2 1Y3 2Y1 2Y2 2Y3 2Y4 HC244 1G 2G 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 1Y4 1Y1 1Y2 1Y3 2A1 2A2 2A3 2A4 HC244 1G 2G 1A1 1A2 1A3 1A4 2Y1 2Y2 2Y3 2Y4 1Y4 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 RD WR IRQ A15–A0 D11–D0 DS DSP56002 EN ADDR DECODE Figure 18. AD7721 to DSP56002 Interface AD7721 to TMS320C20/C25/C5x Interface Figure 19 shows the AD7721 to TMS320C20/C25 interface while Figure 20 shows the AD7721 to TMS320C5x interface. Again, the interface is similar to that of the ADSP-21xx. However, the TMS320C20/C25 has a common RD/ W pin. This output is decoded using the STRB pin. The TMS320C5x has a RD/W pin also so external glue logic can be used to decode the RD/ W pin as done for the C20 and C25. An alternative is to use the RD and WE pins of the C5x. Using these outputs, WE oper- ates as the WR signal while RD functions as the RD signal. Also, additional glue logic is not required. |
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