AD7720

–13–

REV. 0

Offset and Gain Calibration

The analog inputs of the AD7720 can be configured to measure

offset and gain errors. Pins MZERO and GC are used to config-

ure the part. Before calibrating the device, the part should be

reset so that the modulator is in a known state at calibration.

When MZERO is taken high, the analog inputs are tied to

taking MZERO high, 1000 MCLK cycles should be allowed for

the circuitry to settle before the bit stream is read from the

device. The ideal ones density is 50% when bipolar operation is

selected and 37.5% when unipolar mode is selected.

When GC is taken high, VIN(–) is tied to ground while VIN(+)

the circuitry to settle before the bit stream is read. The ideal

ones density is 62.5%.

The calibration results apply only for the particular analog input

mode (unipolar/bipolar) selected when performing the calibra-

tion cycle. On changing to a different analog input mode, a new

calibration must be performed.

Before calibrating, ensure that the supplies have settled and that

the voltage on the analog input pins is between the supply

voltages.

Standby

The part can be put into a low power standby mode by taking

STBY high. During standby, the clock to the modulator is

turned off and bias is removed from all analog circuits.

Reset

The RESET pin is used to reset the modulator to a known state.

When RESET is taken high, the integrator capacitors of the

modulator are shorted and DVAL goes low and remains low

until 20 MCLK cycles after RESET is deasserted. However, an

additional 1000 MCLK cycles should be allowed before reading

the modulator bit stream as the modulator circuitry needs to

settle after the reset.

DVAL

The DVAL pin is used to indicate that an overrange input signal

has resulted in invalid data at the modulator output. As with all

single bit DAC high order sigma-delta modulators, large overloads

on the inputs can cause the modulator to go unstable. The

modulator is designed to be stable with signals within the input

bandwidth that exceed full scale by 20%. When instability is

detected by internal circuits, the modulator is reset to a stable

state and DVAL is held low for 20 clock cycles.

Grounding and Layout

Since the analog inputs are differential, most of the voltages in

the analog modulator are common-mode voltages. The excellent

common-mode rejection of the part will remove common-mode

noise on these inputs. The analog and digital supplies to the

AD7720 are independent and separately pinned out to minimize

coupling between analog and digital sections of the device.

The printed circuit board that houses the AD7720 should be

designed so that the analog and digital sections are separated

and confined to certain areas of the board. This facilitates the

use of ground planes which can easily be separated. A minimum

etch technique is generally best for ground planes as it gives the

best shielding. Digital and analog ground planes should only

be joined in one place. If the AD7720 is the only device requir-

ing an AGND-to-DGND connection, the ground planes should

be connected at the AGND and DGND pins of the AD7720.

If the AD7720 is in a system where multiple devices require

AGND-to-DGND connections, the connection should still be

made at one point only, a star ground point that should be

established as close as possible to the AD7720.

Avoid running digital lines under the device as these will couple

noise onto the die. The analog ground plane should be allowed

to run under the AD7720 to avoid noise coupling. The power

supply lines to the AD7720 should use as large a trace as pos-

sible to provide low impedance paths and reduce the effects of

glitches on the power supply line. Fast switching signals like

clocks should be shielded with digital ground to avoid radiating

noise to other sections of the board, and clock signals should

never be run near the analog inputs. Avoid crossover of digital

and analog signals. Traces on opposite sides of the board should

run at right angles to each other. This will reduce the effects of

feedthrough through the board. A microstrip technique is by far

the best, but is not always possible with a double-sided board.

In this technique, the component side of the board is dedi-

cated to ground planes while signals are placed on the other

side.

Good decoupling is important when using high resolution ADCs.

All analog and digital supplies should be decoupled to AGND

and DGND respectively, with 100 nF ceramic capacitors in

parallel with 10

µF tantalum capacitors. To achieve the best

from these decoupling capacitors, they should be placed as close

as possible to the device, ideally right up against the device. In

systems where a common supply voltage is used to drive both

the AVDD and DVDD of the AD7720, it is recommended that

the system’s AVDD supply is used. This supply should have the

recommended analog supply decoupling between the AVDD

pin of the AD7720 and AGND and the recommended digital

supply decoupling capacitor between the DVDD pins and DGND.