REV. PrC

7/13/01

PRELIMINARY TECHNICAL DATA

AD7484

– 9 –

OFFSET / OVERRANGE

The AD7484 provides a ±8% overrange capability as well as

a programmable Offset Register. The overrange capability is

achieved by the use of a 15th bit (D14) and the CLIP input.

If the CLIP input is at logic high and the contents of the

offset register are zero, then the AD7484 operates as a nor-

mal 14-bit ADC. If the input voltage is greater than the

full-scale voltage, the data output from the ADC will be all

1’s. Similarly, if the input voltage is lower than the zero-

scale voltage, the data output from the ADC will be all 0’s.

In this case D14 acts as an overrange indicator. It is set to a

1 if the analog input voltage is outside the nominal 0 to

+2.5V range.

If the Offset Register contains any value other than zero,

the contents of the register are added to the SAR result at

the end of conversion. This has the effect of shifting the

transfer function of the ADC as shown in Figure 9 and Fig-

ure 10. However, it should be noted that with the CLIP

input set to logic high, the maximum and minimum codes

that the AD7484 will ouput will be 0x3FFF and 0x0000

respectively. Further details are given in Table 1 and Table

2.

Figure 9 shows the effect of writing a positive value to the

Offset Register. If, for example, the contents of the Offset

Register contained the value 1024, then the value of the ana-

log input voltage for which the ADC would transition from

reading all 0’s to 000...001 (the bottom reference point)

would be:

0.5LSB - (1024 LSBs) = -156.326mV

The analog input voltage for which the ADC would read

full-scale (0x3FFF) in this example would be:

2.5V -1.5LSBs - (1024 LSBs) = 2.34352V

000...000

0V

ANALOG INPUT

111...111

000...001

000...010

111...110

111...000

011...111

+VREF-1.5LSB

-OFFSET

1LSB = VREF/16384

Figure 9. Transfer Characteristic With Positive Offset

The effect of writing a negative value to the Offset Register is

shown in Figure 10. If a value of -512 was written to the

Offset Register, the bottom end reference point would now

occur at:

0.5LSB - (-512 LSBs)= +78.20mV

Following from this, the analog input voltage needed to

produce a full-scale (0x3FFF) result from the ADC would

now be:

2.5V - 1.5LSBs - (-512 LSBs) = 2.5779V

000...000

0V

ANALOG INPUT

111...111

000...001

000...010

111...110

111...000

011...111

0.5LSB

-OFFSET

+VREF-1.5LSB

-OFFSET

1LSB = VREF/16384

Figure 10. Transfer Characteristic With NegativeOffset

Table 1 below shows the expected ADC result for a given

analog input voltage with different offset values and with

CLIP tied to logic high. The combined advantages of the

offset and overrange features of the AD7484 are shown

clearly in Table 2. It shows the same range of analog in-

put and offset values as Table 1 but with the clipping

feature disabled.

Values from -1310 to +1310 may be written to the Offset

Register. These values correspond to an offset of ±200mV. A

write to the Offset Register is performed by writing a 15-bit

word to the part as detailed in the Interfacing sections. The

12 LSBs of the 15-bit word contain the offset value, the 3

MSBs must be set to zero. Failure to write zeros to the 3

MSBs may result in the incorrect operation of the device.

Table 1. Clipping Enabled (CLIP = 1)

OFFSET

-512

0

+1024

VIN

ADC DATA, D[0:14]

-200m V

-1822

-1310

-286

-156.3m V

-1536

-1024

0

0V

-512

0

1024

+78.2m V

0

512

1536

+2.3435V

14847

15359

16383

+2.5V

15871

16383

17407

+2.5779V

16383

16895

17919

+2.7V

17182

17694

18718

Table 2. Clipping Disabled (CLIP = 0)

OFFSET

-512

0

+1024

VIN

ADC DATA, D[0:13]

D14

-200mV

00

0

1

-156.3mV

00

0

1

0V

0

0

1024

0

+78.2mV

0

512

1536

0

+2.3435V

14847

15359

16383

0

+2.5V

15871

16383

16383

0

+2.5779V

16383

16383

16383

1

+2.7V

16383

16383

16383

1